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"Layout Generator for Transistor-Level High-Density Regular Circuits."

Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly (2010)

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DOI: 10.1109/TCAD.2009.2035580

access: closed

type: Journal Article

metadata version: 2020-09-24

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  - journals/tcad/LinMM10
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  - https://dblp.org/rec/journals/tcad/LinMM10
Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly:
Layout Generator for Transistor-Level High-Density Regular Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(2): 197-210 (2010)

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