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<dblp>
<article key="journals/tcad/LiuPLWZCLLY23" mdate="2026-01-16">
<author orcid="0000-0002-2454-5561">Siting Liu 0002</author>
<author orcid="0000-0002-1322-5642">Yuan Pu 0001</author>
<author orcid="0000-0003-1220-1363">Peiyu Liao</author>
<author>Hongzhong Wu</author>
<author>Rui Zhang 0040</author>
<author>Zhitang Chen</author>
<author>Wenlong Lv</author>
<author orcid="0000-0002-0977-2774">Yibo Lin</author>
<author orcid="0000-0001-6406-4810">Bei Yu 0001</author>
<title>FastGR: Global Routing on CPU-GPU With Heterogeneous Task Graph Scheduler.</title>
<pages>2317-2330</pages>
<year>2023</year>
<month>July</month>
<volume>42</volume>
<journal>IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.</journal>
<number>7</number>
<ee>https://doi.org/10.1109/TCAD.2022.3217668</ee>
<url>db/journals/tcad/tcad42.html#LiuPLWZCLLY23</url>
</article>
</dblp>
