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"Design and Analysis of Ultra Low Power True Single Phase Clock CMOS 2/3 ..."

Manthena Vamshi Krishna et al. (2010)

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DOI: 10.1109/TCSI.2009.2016183

access: closed

type: Journal Article

metadata version: 2021-07-25

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Manthena Vamshi Krishna, Manh Anh Do, Kiat Seng Yeo, Chirn Chye Boon, Wei Meng Lim:
Design and Analysis of Ultra Low Power True Single Phase Clock CMOS 2/3 Prescaler. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(1): 72-82 (2010)

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