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"A Low-Power and Highly Linear 14-bit Parallel Sampling TDC With Power ..."

Supeng Liu, Yuanjin Zheng (2016)

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DOI: 10.1109/TVLSI.2015.2447001

access: closed

type: Journal Article

metadata version: 2020-03-11

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  - https://dblp.org/rec/journals/tvlsi/LiuZ16
Supeng Liu, Yuanjin Zheng:
A Low-Power and Highly Linear 14-bit Parallel Sampling TDC With Power Gating and DEM in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 24(3): 1083-1091 (2016)

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