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"Parallel and pipelined VLSI implementation of a staged decoder for BCM ..."

Giuseppe Caire et al. (1995)

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DOI: 10.1007/BF02107053

access: closed

type: Journal Article

metadata version: 2020-05-20

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  - journals/vlsisp/CaireVMK95
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  - https://dblp.org/rec/journals/vlsisp/CaireVMK95
Giuseppe Caire, Javier Ventura-Traveset, J. Murphy, Sun-Yuan Kung:
Parallel and pipelined VLSI implementation of a staged decoder for BCM signals. J. VLSI Signal Process. 11(3): 195-211 (1995)

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