<?xml version="1.0" encoding="US-ASCII"?>
<dblp>
<phdthesis key="phd/us/Li17h" mdate="2024-09-28">
<author>Jiajia Li 0002</author>
<title>Improved Physical Design and Signoff Methodologies for Better Integrated Circuit Design Quality</title>
<school>University of California, San Diego, USA</school>
<year>2017</year>
<ee>https://www.escholarship.org/uc/item/59z0584c</ee>
<ee>https://www.escholarship.org/content/qt59z0584c/qt59z0584c.pdf</ee>
</phdthesis>
</dblp>
