• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
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  e.g., codd model
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Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 39 matches

• 2013
• 
  Jianchang Ao, Sheqin Dong, Song Chen, Satoshi Goto:
  Delay-driven layer assignment in global routing under multi-tier interconnect structure. ISPD 2013: 101-107
• 
  Hung-Ming Chen:
  On the way to practical tools for beyond die codesign and integration. ISPD 2013: 61
• 
  David G. Chinnery:
  High performance and low power design techniques for ASIC and custom in nanometer technologies. ISPD 2013: 25-32
• 
  Jordi Cortadella, Javier de San Pedro, Nikita Nikitin, Jordi Petit:
  Physical-aware system-level design for tiled hierarchical chip multiprocessors. ISPD 2013: 3-10
• 
  Florentin Dartu, Qiuyang Wu:
  To do or not to do hierarchical timing? ISPD 2013: 180
• 
  Rickard Ewetz, Cheng-Kok Koh:
  Local merges for effective redundancy in clock networks. ISPD 2013: 162-167
• 
  Shao-Yun Fang, Chung-Wei Lin, Guang-Wan Liao, Yao-Wen Chang:
  Simultaneous OPC- and CMP-aware routing based on accurate closed-form modeling. ISPD 2013: 77-84
• 
  Robert Fischbach, Johann Knechtel, Jens Lienig:
  Utilizing 2D and 3D rectilinear blocks for efficient IP reuse and floorplanning of 3D-integrated systems. ISPD 2013: 11-16
• 
  John Giacobbe:
  Physical design for debug: insurance policy for IC's. ISPD 2013: 122
• 
  Xu He, Wing-Kai Chow, Evangeline F. Y. Young:
  SRP: simultaneous routing and placement for congestion refinement. ISPD 2013: 108-113
• 
  Rimon Ikeno, Takashi Maruyama, Satoshi Komatsu, Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada:
  A structured routing architecture and its design methodology suitable for high-throughput electron beam direct writing with character projection. ISPD 2013: 69-76
• 
  Yoji Kajitani:
  Coding the objects in place and route CAD. ISPD 2013: 62-65
• 
  Jens Lienig:
  Electromigration and its impact on physical design in future technologies. ISPD 2013: 33-40
• 
  Wen-Hao Liu, Cheng-Kok Koh, Yih-Lang Li:
  Case study for placement solutions in ispd11 and dac12 routability-driven placement contests. ISPD 2013: 114-119
• 
  Pei-Wen Luo, Chun Zhang, Yung-Tai Chang, Liang-Chia Cheng, Hung-Hsie Lee, Bih-Lan Sheu, Yu-Shih Su, Ding-Ming Kwai, Yiyu Shi:
  Benchmarking for research in power delivery networks of three-dimensional integrated circuits. ISPD 2013: 17-24
• 
  Liam Madden:
  Heterogeneous 3-d stacking, can we have the best of both (technology) worlds? ISPD 2013: 1-2
• 
  Shigetoshi Nakatake:
  Practicality on placement given by optimality of packing. ISPD 2013: 59-60
• 
  Shigeki Nojima:
  Optical lithography extension with double patterning. ISPD 2013: 68
• 
  Muhammet Mustafa Ozdal, Chirayu Amin, Andrey Ayupov, Steven M. Burns, Gustavo R. Wilke, Cheng Zhuo:
  An improved benchmark suite for the ISPD-2013 discrete cell sizing contest. ISPD 2013: 168-170
• 
  Vidyamani Parkhe:
  Variability aware hierarchical implementation of big chips. ISPD 2013: 181
• 
  Ruchir Puri:
  Opportunities and challenges for high performance microprocessor designs and design automation. ISPD 2013: 179
• 
  Xiang Qiu, Malgorzata Marek-Sadowska, Wojciech Maly:
  Designing VeSFET-based ICs with CMOS-oriented EDA infrastructure. ISPD 2013: 130-136
• 
  Logan M. Rakai, Amin Farshidi, Laleh Behjat, David T. Westwick:
  Buffer sizing for clock networks using robust geometric programming considering variations in buffer sizes. ISPD 2013: 154-161
• 
  Shyam Ramji:
  Challenges in managing timing and wiring contracts during hierarchical floorplanning and design closure. ISPD 2013: 182
• 
  Hamid Shojaei, Azadeh Davoodi, Jeffrey T. Linderoth:
  Planning for local net congestion in global routing. ISPD 2013: 85-92
• 
  Debjit Sinha, Luís Guerra e Silva, Jia Wang, Shesha Raghunathan, Dileep Netrabile, Ahmed Shebaita:
  TAU 2013 variation aware timing analysis contest. ISPD 2013: 171-178
• 
  Yang Song, Hao Yu, Sai Manoj Pudukotai Dinakarrao, Guoyong Shi:
  SRAM dynamic stability verification by reachability analysis with consideration of threshold voltage variation. ISPD 2013: 43-49
• 
  Narayan Srinivasa:
  A compiler for scalable placement and routing of brain-like architectures. ISPD 2013: 120-121
• 
  Kenneth S. Stevens:
  Relative timing driven multi-synchronous design: enabling order-of-magnitude energy reduction. ISPD 2013: 138
• 
  Cliff C. N. Sze, Laleh Behjat, Nikhil Jayakumar, Atul Walimbe, Gregory Ford, Mark Zwolinski, Harish Dangat, Giriraj Kakol:
  ISPD 2013 expert designer/user session (eds). ISPD 2013: 137

skipping 9 more matches