• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 39 matches

• 2025
• 
  Yasunari Suzuki, Takanori Sugiyama, Tomochika Arai, Wang Liao, Koji Inoue, Teruo Tanimoto:
  Q3DE: A fault-tolerant quantum computer architecture for multi-bit burst errors by cosmic rays. CoRR abs/2501.00331 (2025)
• 2024
• 
  Yosuke Ueno, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura:
  Inter-Temperature Bandwidth Reduction in Cryogenic QAOA Machines. IEEE Comput. Archit. Lett. 23(1): 6-9 (2024)
• 
  Yuki Matsumoto, Teruo Tanimoto, Masamitsu Tanaka, Takatsugu Ono:
  Low-Power Half-Flux-Quantum based Counter Circuits for Cryogenic Quantum Computers. QCE 2024: 1007-1013
• 
  Yosuke Ueno, Satoshi Imamura, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura:
  SFQ counter-based precomputation for large-scale cryogenic VQE machines. CoRR abs/2403.00363 (2024)
• 
  Yosuke Ueno, Satoshi Imamura, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura:
  C3-VQA: Cryogenic Counter-based Co-processor for Variational Quantum Algorithms. CoRR abs/2409.07847 (2024)
• 
  Yosuke Ueno, Taku Saito, Teruo Tanimoto, Yasunari Suzuki, Yutaka Tabuchi, Shuhei Tamate, Hiroshi Nakamura:
  High-Performance and Scalable Fault-Tolerant Quantum Computation with Lattice Surgery on a 2.5D Architecture. CoRR abs/2411.17519 (2024)
• 
  Takumi Kobori, Yasunari Suzuki, Yosuke Ueno, Teruo Tanimoto, Synge Todo, Yuuki Tokunaga:
  LSQCA: Resource-Efficient Load/Store Architecture for Limited-Scale Fault-Tolerant Quantum Computing. CoRR abs/2412.20486 (2024)
• 2023
• 
  KuanYi Ng, Aalaa M. A. Babai, Teruo Tanimoto, Satoshi Kawakami, Koji Inoue:
  Empirical Power-performance Analysis of Layer-wise CNN Inference on Single Board Computers. J. Inf. Process. 31: 478-494 (2023)
• 
  Wang Liao, Yasunari Suzuki, Teruo Tanimoto, Yosuke Ueno, Yuuki Tokunaga:
  WIT-Greedy: Hardware System Design of Weighted ITerative Greedy Decoder for Surface Code. ASP-DAC 2023: 209-215
• 
  Yasunari Suzuki, Yosuke Ueno, Wang Liao, Masamitsu Tanaka, Teruo Tanimoto:
  Circuit designs for practical-scale fault-tolerant quantum computing. VLSI Technology and Circuits 2023: 1-2
• 
  Yosuke Ueno, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura:
  Inter-temperature Bandwidth Reduction in Cryogenic QAOA Machines. CoRR abs/2310.01630 (2023)
• 2022
• 
  Teruo Endo, Nao Ohmori, Shigeaki Tanimoto, Takashi Hatashima, Atsushi Kanai:
  Risk Assessment Quantification for Remote Learning Based on Lecture Type. IIAI-AAI 2022: 561-567
• 
  Hiroki Koyama, Yuuna Nakagawa, Shigeaki Tanimoto, Teruo Endo, Takashi Hatashima, Atsushi Kanai:
  A Study of Risk Assessment Quantification for Secure Telework. IIAI-AAI 2022: 574-580
• 
  Ilkwon Byun, Junpyo Kim, Dongmoon Min, Ikki Nagaoka, Kosuke Fukumitsu, Iori Ishikawa, Teruo Tanimoto, Masamitsu Tanaka, Koji Inoue, Jangwoo Kim:
  XQsim: modeling cross-technology control processors for 10+K qubit quantum computers. ISCA 2022: 366-382
• 
  Iori Ishikawa, Ikki Nagaoka, Ryota Kashima, Koki Ishida, Kosuke Fukumitsu, Keitaro Oka, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Akira Fujimaki, Koji Inoue:
  Design of Variable Bit-Width Arithmetic Unit Using Single Flux Quantum Device. ISCAS 2022: 3547-3551
• 
  Yasunari Suzuki, Takanori Sugiyama, Tomochika Arai, Wang Liao, Koji Inoue, Teruo Tanimoto:
  Q3DE: A fault-tolerant quantum computer architecture for multi-bit burst errors by cosmic rays. MICRO 2022: 1110-1125
• 
  Satoshi Matsushita, Teruo Tanimoto, Satoshi Kawakami, Takatsugu Ono, Koji Inoue:
  An Edge Autonomous Lamp Control with Camera Feedback. WF-IoT 2022: 1-7
• 2021
• 
  Koki Ishida, Ilkwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, Koji Inoue:
  Superconductor Computing for Neural Networks. IEEE Micro 41(3): 19-26 (2021)
• 
  Hiroki Koyama, Yuuna Nakagawa, Shigeaki Tanimoto, Teruo Endo, Takashi Hatashima, Atsushi Kanai:
  Risk Assessment of Telework for the New Normal Era. GCCE 2021: 496-497
• 2020
• 
  Keitaro Oka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Koji Inoue:
  Enhancing a manycore-oriented compressed cache for GPGPU. HPC Asia 2020: 22-31
• 
  Teruo Tanimoto, Shuhei Matsuo, Satoshi Kawakami, Yutaka Tabuchi, Masao Hirokawa, Koji Inoue:
  How Many Trials Do We Need for Reliable NISQ Computing? ISVLSI 2020: 288-290
• 
  Teruo Tanimoto, Shuhei Matsuo, Satoshi Kawakami, Yutaka Tabuchi, Masao Hirokawa, Koji Inoue:
  Practical Error Modeling Toward Realistic NISQ Simulation. ISVLSI 2020: 291-293
• 
  Koki Ishida, Ilkwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, Koji Inoue:
  SuperNPU: An Extremely Fast Neural Processing Unit Using Superconducting Logic Devices. MICRO 2020: 58-72
• 
  Koki Ishida, Masamitsu Tanaka, Ikki Nagaoka, Takatsugu Ono, Satoshi Kawakami, Teruo Tanimoto, Akira Fujimaki, Koji Inoue:
  32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum Logic. VLSI Circuits 2020: 1-2
• 2019
• 
  Teruo Tanimoto, Takatsugu Ono, Koji Inoue:
  Critical Path Based Microarchitectural Bottleneck Analysis for Out-of-Order Execution. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 102-A(6): 758-766 (2019)
• 
  Shigeaki Tanimoto, Satomu Toriyama, Motoi Iwashita, Teruo Endo, Prajak Chertchom:
  Secure Operation of Biometric Authentication Based on User's Viewpoint. BCD 2019: 166-171
• 2017
• 
  Hiroshi Sasaki, Fang-Hsiang Su, Teruo Tanimoto, Simha Sethumadhavan:
  Heavy Tails in Program Structure. IEEE Comput. Archit. Lett. 16(1): 34-37 (2017)
• 
  Teruo Tanimoto, Takatsugu Ono, Koji Inoue, Hiroshi Sasaki:
  Enhanced Dependence Graph Model for Critical Path Analysis on Modern Out-of-Order Processors. IEEE Comput. Archit. Lett. 16(2): 111-114 (2017)
• 
  Teruo Tanimoto, Takatsugu Ono, Koji Inoue:
  Dependence Graph Model for Accurate Critical Path Analysis on Out-of-Order Processors. J. Inf. Process. 25: 983-992 (2017)
• 
  Teruo Tanimoto, Takatsugu Ono, Koji Inoue:
  CPCI Stack: Metric for Accurate Bottleneck Analysis on OoO Microprocessors. CANDAR 2017: 166-172

skipping 9 more matches