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Robert Pawlowski
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2020 – today
- 2023
- [j2]Sriram Aananthakrishnan, Shamsul Abedin, Vincent Cavé, Fabio Checconi, Kristof Du Bois, Stijn Eyerman, Joshua B. Fryman, Wim Heirman, Jason Howard, Ibrahim Hur, Samkit Jain, Marek M. Landowski, Kevin Ma, Jarrod A. Nelson, Robert Pawlowski, Fabrizio Petrini, Sebastian Szkoda, Sanjaya Tayal, Jesmin Jahan Tithi, Yves Vandriessche:
The Intel Programmable and Integrated Unified Memory Architecture Graph Analytics Processor. IEEE Micro 43(5): 78-87 (2023) - 2020
- [c6]Sriram Aananthakrishnan, Robert Pawlowski, Joshua B. Fryman, Ibrahim Hur:
Efficient Sparse Matrix-Vector Multiplication on Intel PIUMA Architecture. HPEC 2020: 1-2 - [i1]Sriram Aananthakrishnan, Nesreen K. Ahmed, Vincent Cavé, Marcelo Cintra, Yigit Demir, Kristof Du Bois, Stijn Eyerman, Joshua B. Fryman, Ivan Ganev, Wim Heirman, Hans-Christian Hoppe, Jason Howard, Ibrahim Hur, Midhunchandra Kodiyath, Samkit Jain, Daniel S. Klowden, Marek M. Landowski, Laurent Montigny, Ankit More, Przemyslaw Ossowski, Robert Pawlowski, Nick Pepperling, Fabrizio Petrini, Mariusz Sikora, Balasubramanian Seshasayee, Shaden Smith, Sebastian Szkoda, Sanjaya Tayal, Jesmin Jahan Tithi, Yves Vandriessche, Izajasz P. Wrosz:
PIUMA: Programmable Integrated Unified Memory Architecture. CoRR abs/2010.06277 (2020)
2010 – 2019
- 2014
- [c5]Robert Pawlowski, Joseph Crop, Minki Cho, James W. Tschanz, Vivek De, Thomas Fairbanks, Heather Quinn, Shekhar Borkar, Patrick Yin Chiang:
Characterization of radiation-induced SRAM and logic soft errors from 0.33V to 1.0V in 65nm CMOS. CICC 2014: 1-4 - 2012
- [c4]Joseph Crop, Robert Pawlowski, Patrick Chiang:
Regaining throughput using completion detection for error-resilient, near-threshold logic. DAC 2012: 974-979 - [c3]Robert Pawlowski, Evgeni Krimer, Joseph Crop, Jacob Postman, Nariman Moezzi Madani, Mattan Erez, Patrick Chiang:
A 530mV 10-lane SIMD processor with variation resiliency in 45nm SOI. ISSCC 2012: 492-494 - 2011
- [c2]Joseph Crop, Robert Pawlowski, Nariman Moezzi Madani, Jarrod Jackson, Patrick Chiang:
Design automation methodology for improving the variability of synthesized digital circuits operating in the sub/near-threshold regime. IGCC 2011: 1-6 - [c1]Robert Pawlowski, Bozena Malysiak-Mrozek, Stanislaw Kozielski, Dariusz Mrozek:
Fast and Accurate Similarity Searching of Biopolymer Sequences with GPU and CUDA. ICA3PP (1) 2011: 230-243 - 2010
- [j1]Evgeni Krimer, Robert Pawlowski, Mattan Erez, Patrick Chiang:
Synctium: a Near-Threshold Stream Processor for Energy-Constrained Parallel Applications. IEEE Comput. Archit. Lett. 9(1): 21-24 (2010)
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