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Arijit Dutta
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2020 – today
- 2024
- [j3]Arijit Dutta, Luis Miguel Samaniego Campoverde, Mauro Tropea, Floriano De Rango:
A Comprehensive Review of Recent Developments in VANET for Traffic, Safety & Remote Monitoring Applications. J. Netw. Syst. Manag. 32(4): 73 (2024) - 2023
- [c8]Inam Ullah Khan, Muhammad Yaseen Ayub
, Asrin Abdollahi, Arijit Dutta
A Hybrid Deep Learning Model-Based Intrusion Detection System for Emergency Planning Using IoT-Network. ICT-DM 2023: 1-5 - 2021
- [j2]Arijit Dutta
MProve+: Privacy Enhancing Proof of Reserves Protocol for Monero. IEEE Trans. Inf. Forensics Secur. 16: 3900-3915 (2021) - [c7]Luina Pani, Arijit Dutta, Chinmaya Misra
Assisting fog-cloud computing with an adaptive traffic awareness resource provisioning algorithm for health data. OCIT 2021: 290-295 - [c6]Arijit Dutta, Luina Pani, Chinmaya Misra
Finite Buffer Queueing System Performance Study with Multi Heterogeneous Fog Architecture. OCIT 2021: 296-301 - [i3]Arijit Dutta, Suyash Bagad, Saravanan Vijayakumaran:
MProve+ : Privacy Enhancing Proof of Reserves Protocol for Monero. IACR Cryptol. ePrint Arch. 2021: 1077 (2021)
2010 – 2019
- 2019
- [c5]Arijit Dutta, Saravanan Vijayakumaran:
Revelio: A MimbleWimble Proof of Reserves Protocol. CVCBT 2019: 7-11 - [c4]Arijit Dutta, Saravanan Vijayakumaran:
MProve: A Proof of Reserves Protocol for Monero Exchanges. EuroS&P Workshops 2019: 330-339 - [c3]Arijit Dutta, Arnab Jana
Nummatus: A Privacy Preserving Proof of Reserves Protocol for Quisquis. INDOCRYPT 2019: 195-215 - [i2]Arijit Dutta, Saravanan Vijayakumaran:
Revelio: A MimbleWimble Proof of Reserves Protocol. IACR Cryptol. ePrint Arch. 2019: 684 (2019) - 2018
- [i1]Arijit Dutta, Saravanan Vijayakumaran:
MProve: A Proof of Assets Protocol for Monero Exchanges. IACR Cryptol. ePrint Arch. 2018: 1210 (2018)
2000 – 2009
- 2008
- [c2]Bodhisatya Sarker, Jaswinder Ahuja, Arijit Dutta, Srinath D., Kaip Sridhar, Radhakrishnan Nair, Jayant Lahiri:
Penalty for power reduction -: performance or schedule or yield? ISLPED 2008: 303-304 - 2001
- [j1]Nihar R. Mohapatra, Arijit Dutta, G. Sridhar, Madhav P. Desai, V. Ramgopal Rao
Sub-100 nm CMOS circuit performance with high-K gate dielectrics. Microelectron. Reliab. 41(7): 1045-1048 (2001) - [c1]Nihar R. Mohapatra, Arijit Dutta, Madhav P. Desai, V. Ramgopal Rao:
Effect Of Fringing Capacitances In Sub 100 Nm Mosfet's With High-K Gate Dielectrics. VLSI Design 2001: 479-
Coauthor Index
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