default search action
Kohei Hosokawa
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
- [c14]Daisuke Saito, Yojiro Mori, Kohei Hosokawa, Shigeyuki Yanagimachi, Hiroshi Hasegawa:
Cost-Effective Capacity Enhancement of Survivable Optical Networks by Supplemental Band Expansion and Backup Resource Sharing. OFC 2024: 1-3 - [c13]Yusuke Sasaki, Masaki Sato, Hidemi Noguchi, Kohei Hosokawa:
State-of-Polarization Monitoring Employing Optical Supervisory Channel Enabling Instantaneous Fluctuation Detection and Localization. OFC 2024: 1-3 - [c12]Hitoshi Takeshita, Yusuke Shimomura, Kohei Hosokawa:
Transmission capacity expansion using bidirectional multicore EDFA under bidirectional signal assignment. OFC 2024: 1-3 - 2023
- [j4]Kyosuke Nakada, Hitoshi Takeshita
, Yuki Kuno, Yusuke Matsuno, Itsuki Urashima, Yusuke Shimomura, Yuji Hotta, Tsubasa Sasaki, Yudai Uchida, Kohei Hosokawa, Ryohei Otowa, Rika Tahara, Emmanuel Le Taillandier de Gabory
Bidirectional single-multicore-fiber spatial channel network based on a spatial cross-connect and multicore EDFA that efficiently accommodates asymmetric data traffic. JOCN 15(11): 871-882 (2023) - [c11]Kyosuke Nakada, Hitoshi Takeshita, Yuki Kuno, Yusuke Matsuno, Itsuki Urashima, Yusuke Shimomura, Yuji Hotta, Tsubasa Sasaki, Yudai Uchida, Kohei Hosokawa, Ryohei Otowa, Rika Tahara, Emmanuel Le Taillandier de Gabory, Yasuki Sakurai, Ryuichi Sugizaki, Masahiko Jinno:
Single Multicore-Fiber Bidirectional Spatial Channel Network Based on Spatial Cross-Connect and Multicore EDFA Efficiently Accommodating Asymmetric Traffic. OFC 2023: 1-3 - [c10]Daisuke Saito, Yojiro Mori, Kohei Hosokawa, Shigeyuki Yanagimachi, Hiroshi Hasegawa:
Cost-effective Network Capacity Enhancement with Multi-band Virtual Bypass Links. OFC 2023: 1-3 - 2022
- [c9]Hitoshi Takeshita, Kohei Nakamura, Yuushi Matsuo, Takanori Inoue, Daishi Masuda, Tetsuya Hiwatashi, Kohei Hosokawa, Yoshihisa Inada, Emmanuel Le Taillandier de Gabory:
First Demonstration of Uncoupled 4-Core Multicore Fiber in a Submarine Cable Prototype with Integrated Multicore EDFA. OFC 2022: 1-3 - [c8]Eita Kobayashi, Kohei Hosokawa, Shigeyuki Yanagimachi, Emmanuel Le Taillandier de Gabory:
Fast and Compact Node Monitoring System for Multi-Vendor Optical Network. OECC/PSC 2022: 1-3 - [c7]Hitoshi Takeshita
Novel Bidirectional Multicore EDFA Based on Twin Turbo Cladding Pumping Using Bidirectional Pumping and Recycling. OECC/PSC 2022: 1-3 - 2021
- [c6]Yohei Hasegawa
Evaluation of the Link Budget Increase using Error-Tolerant TCPs for Optical Communication in Nonlinear Regime on 200G PM-16QAM Real-time Signal Demodulation. ECOC 2021: 1-4 - [c5]Keiichi Matsumoto, Kohei Hosokawa, Emmanuel Le Taillandier de Gabory:
Reduction of Power Consumption of Full C-band WDM Amplification by WDM Sub-banding and SDM Conversion using a High Core Count Multi-Core Amplifier. ECOC 2021: 1-3 - [c4]Manabu Arikawa, Kohei Hosokawa, Kazunori Hayashi:
Long-Haul WDM/SDM Transmission over Coupled 4-Core Fiber with Coupled 4-Core EDFA and Its MDL Characteristics Estimation. OFC 2021: 1-3 - 2020
- [c3]Hitoshi Takeshita
Evaluation of the Signal Amplified by CC-MC-EDFA under Inter-core Crosstalk Using a Scalable SDM/TDM Translation Method. ECOC 2020: 1-4
2010 – 2019
- 2015
- [c2]Kiyoshi Fukuchi, Atsufumi Shihavama, Kohei Hosokawa, Wakako Maeda, Hidemi Noguchi, Jun-ichi Abe:
Practical techniques for nonlinear compensation and mitigation. OFC 2015: 1-2
2000 – 2009
- 2007
- [j3]Kohei Hosokawa, Katsunori Tanaka, Yuichi Nakamura:
Efficient Memory Utilization for High-Speed FPGA-Based Hardware Emulators with SDRAMs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(12): 2810-2817 (2007) - 2006
- [j2]Yuichi Nakamura, Kohei Hosokawa:
Fast FPGA-Emulation-Based Simulation Environment for Custom Processors. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(12): 3464-3470 (2006) - 2005
- [j1]Kohei Hosokawa, Mitsuhiko Yagyu, Akinori Nishihara:
Design Method for 2-Channel Signal Word Decomposed Filters with Minimum Output Error and Their Effective VLSI Implementation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(8): 2044-2054 (2005) - 2004
- [c1]Yuichi Nakamura, Kohei Hosokawa, Ichiro Kuroda, Ko Yoshikawa
A fast hardware/software co-verification method for system-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication. DAC 2004: 299-304
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-07 21:15 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: