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Howard Tang
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2010 – 2019
- 2016
- [j6]Yoon Hwee Leow
, Howard Tang, Zhuochao Sun
A 1 V 103 dB 3rd-Order Audio Continuous-Time ΔΣ ADC With Enhanced Noise Shaping in 65 nm CMOS. IEEE J. Solid State Circuits 51(11): 2625-2638 (2016) - 2015
- [j5]Guolei Yu, Kin Wai Roy Chew, Zhuochao Sun
A 400 nW Single-Inductor Dual-Input-Tri-Output DC-DC Buck-Boost Converter With Maximum Power Point Tracking for Indoor Photovoltaic Energy Harvesting. IEEE J. Solid State Circuits 50(11): 2758-2772 (2015) - 2014
- [j4]Howard Tang, Zhuochao Sun
A 1.33 µW 8.02-ENOB 100 kS/s Successive Approximation ADC With Supply Reduction Technique for Implantable Retinal Prosthesis. IEEE Trans. Biomed. Circuits Syst. 8(6): 844-856 (2014) - [j3]Zhuochao Sun
A 0.42-V Input Boost dc-dc Converter With Pseudo-Digital Pulsewidth Modulation. IEEE Trans. Circuits Syst. II Express Briefs 61-II(8): 634-638 (2014) - [j2]Howard Tang, Zhuochao Sun
A 5.8 nW 9.1-ENOB 1-kS/s Local Asynchronous Successive Approximation Register ADC for Implantable Medical Device. IEEE Trans. Very Large Scale Integr. Syst. 22(10): 2220-2224 (2014) - 2013
- [c5]Kin Wai Roy Chew, Zhuochao Sun
A 400nW single-inductor dual-input-tri-output DC-DC buck-boost converter with maximum power point tracking for indoor photovoltaic energy harvesting. ISSCC 2013: 68-69 - 2012
- [c4]Howard Tang, Joshua Yung Lih Low, Jeremy Yung Shern Low, Liter Siek
A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion. APCCAS 2012: 272-275 - 2010
- [c3]Howard Tang, Liter Siek
Analog-to-Digital Converter with energy recovery capability using adiabatic technique. APCCAS 2010: 780-783
2000 – 2009
- 2004
- [j1]Jam Wem Lee, Jin Lian Su, Howard Tang:
Body ballast resistor enhances ESD robustness of deep sub-micron CMOS circuit. Microelectron. J. 35(9): 783-788 (2004) - 2003
- [c2]Jam Wem Lee, Yiming Li, Howard Tang:
Silicide Optimization for Electrostatic Discharge Protection Devices in Sub-100 nm CMOS Circuit Design. VLSI 2003: 251-260 - 2001
- [c1]Ming-Dou Ker, Wen-Yu Lo, Tung-Yang Chen, Howard Tang, S.-S. Chen, Mu-Chun Wang
Compact Layout Rule Extraction for Latchup Prevention in a 0.25-?m Shallow-Trench-Isolation Silicided Bulk CMOS Process. ISQED 2001: 267-272
Coauthor Index
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