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Christian W. Baks
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2020 – today
- 2023
- [j11]Timothy O. Dickson
, Zeynep Toprak Deniz
A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links. IEEE J. Solid State Circuits 58(4): 1074-1086 (2023) - [c28]David J. Frank, Sudipto Chakraborty, Kevin Tien, Pat Rosno, Mark Yeck, Joseph A. Glick, Raphael Robertazzi, Ray Richetta, John F. Bulzacchelli, Daniel Ramirez, Dereje Yilma, Andrew Davies, Rajiv V. Joshi, Scott Lekuch, Ken Inoue, Devin Underwood, Dorothy Wisnieff, Chris Baks, John Timmerwilke, Peilin Song, Blake R. Johnson, Brian P. Gaucher, Daniel J. Friedman:
Low power cryogenic RF ASICs for quantum computing. CICC 2023: 1-8 - 2022
- [j10]Sudipto Chakraborty
A Cryo-CMOS Low-Power Semi-Autonomous Transmon Qubit State Controller in 14-nm FinFET Technology. IEEE J. Solid State Circuits 57(11): 3258-3273 (2022) - [j9]Bodhisatwa Sadhu
A 24-30-GHz 256-Element Dual-Polarized 5G Phased Array Using Fast On-Chip Beam Calculators and Magnetoelectric Dipole Antennas. IEEE J. Solid State Circuits 57(12): 3599-3616 (2022) - [c27]Kevin Tien, Ken Inoue, Scott Lekuch, David J. Frank, Sudipto Chakraborty, Pat Rosno, Thomas Fox, Mark Yeck, Joseph A. Glick, Raphael Robertazzi, Ray Richetta, John F. Bulzacchelli, Daniel Ramirez, Dereje Yilma, Andrew Davies, Rajiv V. Joshi, Devin Underwood, Dorothy Wisnieff, Christian W. Baks, Donald Bethune, John Timmerwilke, Blake R. Johnson, Brian P. Gaucher, Daniel J. Friedman:
A Cryo-CMOS Transmon Qubit Controller and Verification with FPGA Emulation. DATE 2022: 13-16 - [c26]David J. Frank, Sudipto Chakraborty, Kevin Tien, Pat Rosno, Thomas Fox, Mark Yeck, Joseph A. Glick, Raphael Robertazzi, Ray Richetta, John F. Bulzacchelli, Daniel Ramirez, Dereje Yilma, Andrew Davies, Rajiv V. Joshi, Shawn D. Chambers, Scott Lekuch, Ken Inoue, Devin Underwood, Dorothy Wisnieff, Christian W. Baks, Donald Bethune, John Timmerwilke, Blake R. Johnson, Brian P. Gaucher, Daniel J. Friedman:
A Cryo-CMOS Low-Power Semi-Autonomous Qubit State Controller in 14nm FinFET Technology. ISSCC 2022: 360-362 - [c25]Timothy O. Dickson, Zeynep Toprak Deniz, Martin Cochet, Marcel A. Kossel, Thomas Morf, Young-Ho Choi, Pier Andrea Francese
A 72GS/s, 8-bit DAC-based Wireline Transmitter in 4nm FinFET CMOS for 200+Gb/s Serial Links. VLSI Technology and Circuits 2022: 28-29 - [c24]Serdar S. Yonar, Pier Andrea Francese
An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS. VLSI Technology and Circuits 2022: 168-169 - 2020
- [j8]Bodhisatwa Sadhu
A 250-mW 60-GHz CMOS Transceiver SoC Integrated With a Four-Element AiP Providing Broad Angular Link Coverage. IEEE J. Solid State Circuits 55(6): 1516-1529 (2020) - [c23]Nicolas Dupuis, Jonathan E. Proesel, Nicolas Boyer, Herschel A. Ainspan, Christian W. Baks, Fuad E. Doany, Elaine Cyr, Benjamin G. Lee:
An 8×8 Silicon Photonic Switch Module with Nanosecond-Scale Reconfigurability. OFC 2020: 1-3 - [c22]Jonathan E. Proesel, Nicolas Dupuis, Herschel A. Ainspan, Christian W. Baks, Fuad E. Doany, Nicolas Boyer, Elaine Cyr, Benjamin G. Lee:
A Monolithically Integrated Silicon Photonics 8×8 Switch in 90nm SOI CMOS. VLSI Circuits 2020: 1-2
2010 – 2019
- 2019
- [c21]Nicolas Dupuis, Fuad E. Doany, Russell A. Budd, Laurent Schares, Christian W. Baks, Daniel M. Kuchta, Takako Hirokawa, Benjamin G. Lee:
A Nonblocking 4×4 Mach-Zehnder Switch with Integrated Gain and Nanosecond-Scale Reconfiguration Time. OFC 2019: 1-3 - [c20]Benjamin G. Lee, Nicolas Dupuis, Fuad E. Doany, Laurent Schares, Nicolas Boyer, Nathalie Normand, Herschel A. Ainspan, Christian W. Baks, Jonathan E. Proesel, Isabel De Sousa, Mounir Meghelli, Marc A. Taubenblatt:
Toward Optical Networks using Rapid Amplified Multi-Wavelength Photonic Switches. OFC 2019: 1-3 - 2018
- [j7]Ilter Özkaya, Alessandro Cevrero, Pier Andrea Francese
A 60-Gb/s 1.9-pJ/bit NRZ Optical Receiver With Low-Latency Digital CDR in 14-nm CMOS FinFET. IEEE J. Solid State Circuits 53(4): 1227-1237 (2018) - [c19]Alex Forencich, Valerija Kamchevska, Nicolas Dupuis, Benjamin G. Lee, Christian W. Baks, George Papen, Laurent Schares:
System-Level Demonstration of a Dynamically Reconfigured Burst-Mode Link Using a Nanosecond Si-Photonic Switch. OFC 2018: 1-3 - [c18]Benjamin G. Lee, Nicolas Dupuis, Jason Orcutt, Javier Ayala, Karen Nummy, Herschel A. Ainspan, Jonathan E. Proesel, Christian W. Baks, Douglas M. Gill, Mounir Meghelli, William M. J. Green:
FEC-Free 60-Gb/s Silicon Photonic Link Using SiGe-Driver ICs Hybrid-Integrated with Photonics-Enabled CMOS. OFC 2018: 1-3 - [c17]Xiaoxiong Gu, Bodhisatwa Sadhu, Duixian Liu, Christian W. Baks, Alberto Valdes-Garcia:
Antenna-in-package design and module integration for millimeter-wave communication and 5G. VLSI-DAT 2018: 1-2 - 2017
- [j6]Ilter Özkaya
A 64-Gb/s 1.4-pJ/b NRZ Optical Receiver Data-Path in 14-nm CMOS FinFET. IEEE J. Solid State Circuits 52(12): 3458-3473 (2017) - [c16]Benjamin G. Lee, Nicolas Dupuis, Renato Rimolo-Donadio, Tam N. Huynh, Christian W. Baks, Douglas M. Gill, William M. J. Green:
Driver-integrated 56-Gb/s segmented electrode silicon Mach Zehnder modulator using optical-domain equalization. OFC 2017: 1-3 - 2016
- [c15]Jason S. Orcutt, Douglas M. Gill, Jonathan E. Proesel, John J. Ellis-Monaghan, Folkert Horst, Tymon Barwicz, Chi Xiong, Frederick G. Anderson, Ankur Agrawal, Yves Martin, Christian W. Baks, Marwan Khater, Jessie C. Rosenberg, W. D. Sacher, Jens Hofrichter, Edward Kiewra, Andreas D. Stricker, Frank Libsch, Bert Jan Offrein, Mounir Meghelli, Natalie B. Feilchenfeld, Wilfried Haensch, William M. J. Green:
Monolithic silicon photonics at 25 Gb/s. OFC 2016: 1-3 - 2015
- [j5]Timothy O. Dickson, Yong Liu, Sergey V. Rylov
A 1.4 pJ/bit, Power-Scalable 16×12 Gb/s Source-Synchronous I/O With DFE Receiver in 32 nm SOI CMOS Technology. IEEE J. Solid State Circuits 50(8): 1917-1931 (2015) - [j4]Alexander V. Rylyakov, Jonathan E. Proesel, Sergey V. Rylov
A 25 Gb/s Burst-Mode Receiver for Low Latency Photonic Switch Networks. IEEE J. Solid State Circuits 50(12): 3120-3132 (2015) - [c14]Alexander V. Rylyakov, Jonathan E. Proesel, Sergey V. Rylov, Benjamin G. Lee, John F. Bulzacchelli, Abhijeet Ardey, Benjamin D. Parker, Michael P. Beakes, Christian W. Baks, Clint Schow, Mounir Meghelli:
22.1 A 25Gb/s burst-mode receiver for rapidly reconfigurable optical networks. ISSCC 2015: 1-3 - [c13]Benjamin G. Lee, Renato Rimolo-Donadio, Alexander V. Rylyakov, Jonathan E. Proesel, John F. Bulzacchelli, Christian W. Baks, Mounir Meghelli, Clint L. Schow, Anand Ramaswamy, Jonathan E. Roth, Jae-Hyuk Shin, Brian R. Koch, Daniel K. Sparacin, Gregory A. Fish:
A WDM-Compatible 4 × 32-Gb/s CMOS-driven electro-absorption modulator array. OFC 2015: 1-3 - [c12]Anand Ramaswamy, Jonathan E. Roth, Erik J. Norberg, Robert S. Guzzon, Jae-Hyuk Shin, J. T. Imamura, Brian R. Koch, Daniel K. Sparacin, Gregory A. Fish, Benjamin G. Lee, Renato Rimolo-Donadio, Christian W. Baks, Alexander V. Rylyakov, Jonathan E. Proesel, Mounir Meghelli, Clint L. Schow:
A WDM 4×28Gbps integrated silicon photonic transmitter driven by 32nm CMOS driver ICs. OFC 2015: 1-3 - 2014
- [c11]Timothy O. Dickson, Yong Liu, Sergey V. Rylov, Ankur Agrawal, Seongwon Kim, Ping-Hsuan Hsieh
A 1.4-pJ/b, power-scalable 16×12-Gb/s source-synchronous I/O with DFE receiver in 32nm SOI CMOS technology. CICC 2014: 1-4 - [c10]Nicolas Dupuis, Daniel M. Kuchta, Fuad E. Doany, Alexander V. Rylyakov, Jonathan E. Proesel, Christian W. Baks, Clint L. Schow, S. Luong, C. Xie, L. Wang, S. Huang, K. Jackson, N. Y. Li:
Exploring the limits of high-speed receivers for multimode VCSEL-based optical links. OFC 2014: 1-3 - [c9]Nicolas Dupuis, Benjamin G. Lee, Jonathan E. Proesel, Alexander V. Rylyakov, Renato Rimolo-Donadio
30Gbps optical link utilizing heterogeneously integrated III-V/Si photonics and CMOS circuits. OFC 2014: 1-3 - [c8]Daniel M. Kuchta, Alexander V. Rylyakov, Clint L. Schow, Jonathan E. Proesel, Christian W. Baks, Petter Westbergh, Johan S. Gustavsson, Anders Larsson:
64Gb/s transmission over 57m MMF using an NRZ modulated 850nm VCSEL. OFC 2014: 1-3 - [c7]Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Filipp Akopyan, Jun Sawada, John V. Arthur, Paul Merolla, Pallab Datta, Marc González Tallada, Brian Taba, Alexander Andreopoulos, Arnon Amir
Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100× Speedup in Time-to-Solution and ~100, 000× Reduction in Energy-to-Solution. SC 2014: 27-38 - 2013
- [c6]Solomon Assefa, Huapu Pan, Steven Shank, William M. J. Green, Alexander V. Rylyakov, Clint Schow, Marwan Khater, Swetha Kamlapurkar, Edward Kiewra, Carol Reinholm, Teya Topuria, Philip Rice, Christian W. Baks, Yurii A. Vlasov:
Monolithically integrated silicon nanophotonics receiver in 90nm CMOS technology node. OFC/NFOEC 2013: 1-3 - [c5]Daniel M. Kuchta, Clint L. Schow, Alexander V. Rylyakov, Jonathan E. Proesel, Fuad E. Doany, Christian W. Baks, B. H. Hamel-Bissell, Chris Kocot, L. Graham, R. Johnson, Gary Landry, E. Shaw, A. MacInnes, Jim Tatum:
A 56.1Gb/s NRZ modulated 850nm VCSEL-based optical link. OFC/NFOEC 2013: 1-3 - [c4]Benjamin G. Lee, Alexander V. Rylyakov, William M. J. Green, Solomon Assefa, Christian W. Baks, Renato Rimolo-Donadio, Daniel M. Kuchta, Marwan H. Khater, Tymon Barwicz, Carol Reinholm, Edward Kiewra, Steven M. Shank, Clint L. Schow, Yurii A. Vlasov:
Four- and eight-port photonic switches monolithically integrated with digital CMOS logic and driver circuits. OFC/NFOEC 2013: 1-3 - [c3]Jonathan E. Proesel, Benjamin G. Lee, Christian W. Baks, Clint L. Schow:
35-Gb/s VCSEL-Based optical link using 32-nm SOI CMOS circuits. OFC/NFOEC 2013: 1-3 - 2012
- [j3]Jonathan E. Proesel, Benjamin G. Lee, Alexander V. Rylyakov, Christian W. Baks, Clint L. Schow:
Ultra-Low-Power 10 to 285 Gb/s CMOS-Driven VCSEL-Based Optical Links [Invited]. JOCN 4(11): B114-B123 (2012) - [j2]Miroslav Kotzev, Renato Rimolo-Donadio
Electrical Performance of the Recessed Probe Launch Technique for Measurement of Embedded Multilayer Structures. IEEE Trans. Instrum. Meas. 61(12): 3198-3206 (2012)
2000 – 2009
- 2009
- [j1]Clint L. Schow, Fuad E. Doany, Chen Chen, Alexander V. Rylyakov, Christian W. Baks, Daniel M. Kuchta, Richard A. John, Jeffrey A. Kash:
Low-Power 16 x 10 Gb/s Bi-Directional Single Chip CMOS Optical Transceivers Operating at ≪ 5 mW/Gb/s/link. IEEE J. Solid State Circuits 44(1): 301-313 (2009) - 2008
- [c2]Clint Schow, Fuad E. Doany, Chen Chen, Alexander V. Rylyakov, Christian W. Baks, Daniel M. Kuchta, Richard A. John, Jeffrey A. Kash:
A ≪5mW/Gb/s/link, 16×10Gb/s Bi-Directional Single-Chip CMOS Optical Transceiver for Board-Level Optical Interconnects. ISSCC 2008: 294-295 - 2005
- [c1]John U. Knickerbocker, Chirag S. Patel, Paul S. Andry, Cornelia K. Tsang, L. Paivikki Buchwalter, Edmund J. Sprogis, Hua Gan, Raymond R. Horton, Robert J. Polastre, Steven L. Wright, Christian D. Schuster, Christian W. Baks, Fuad E. Doany, Joanna Rosner, Steven Cordes:
Three dimensional silicon integration using fine pitch interconnection, silicon processing and silicon carrier packaging technology. CICC 2005: 659-662
Coauthor Index
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