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Daniel Mealha Cabrita

Daniel M. Cabrita

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2010 – 2019

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2016
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Daniel Mealha Cabrita, Carlos Raimundo Erig Lima:
A Fast Simulator in FPGA for LUT-Based Combinational Logic Circuits of Arbitrary Topology for Evolutionary Algorithms. J. Circuits Syst. Comput. 25(2): 1650009:1-1650009:23 (2016)
2013
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Daniel M. Cabrita, Walter Godoy Jr., Heitor S. Lopes:
A fast modular simulator for combinational logic circuits generated by genetic algorithm. IEEE Congress on Evolutionary Computation 2013: 2797-2801

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