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Hasan Hassan
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2020 – today
- 2024
- [j11]Ataberk Olgun
, F. Nisa Bostanci
Sectored DRAM: A Practical Energy-Efficient and High-Performance Fine-Grained DRAM Architecture. ACM Trans. Archit. Code Optim. 21(3): 60:1-60:29 (2024) - [c28]Hasan Hassan, Ataberk Olgun, A. Giray Yaglikçi, Haocong Luo, Onur Mutlu:
Self-Managing DRAM: A Low-Cost Framework for Enabling Autonomous and Efficient DRAM Maintenance Operations. MICRO 2024: 949-965 - 2023
- [j10]Ataberk Olgun
PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM. ACM Trans. Archit. Code Optim. 20(1): 8:1-8:31 (2023) - [j9]Ataberk Olgun
DRAM Bender: An Extensible and Versatile FPGA-Based Infrastructure to Easily Test State-of-the-Art DRAM Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 5098-5112 (2023) - [i34]Hasan Hassan:
Improving DRAM Performance, Reliability, and Security by Rigorously Understanding Intrinsic DRAM Operation. CoRR abs/2303.07445 (2023) - 2022
- [b1]Hasan Hassan:
Improving DRAM Performance, Reliability, and Security by Rigorously Understanding Intrinsic DRAM Operation. ETH Zurich, Zürich, Switzerland, 2022 - [j8]Nandita Vijaykumar, Ataberk Olgun
MetaSys: A Practical Open-source Metadata Management System to Implement and Evaluate Cross-layer Optimizations. ACM Trans. Archit. Code Optim. 19(2): 26:1-26:29 (2022) - [c27]Abdullah Giray Yaglikçi, Haocong Luo, Geraldo F. de Oliviera, Ataberk Olgun, Minesh Patel, Jisung Park, Hasan Hassan, Jeremie S. Kim, Lois Orosa
Understanding RowHammer Under Reduced Wordline Voltage: An Experimental Study Using Real DRAM Devices. DSN 2022: 475-487 - [c26]F. Nisa Bostanci, Ataberk Olgun, Lois Orosa
DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators. HPCA 2022: 1141-1155 - [c25]Ataberk Olgun, Juan Gómez-Luna, Konstantinos Kanellopoulos, Behzad Salami, Hasan Hassan, Oguz Ergin
PiDRAM: An FPGA-based Framework for End-to-end Evaluation of Processing-in-DRAM Techniques. ISVLSI 2022: 267-272 - [c24]Abdullah Giray Yaglikçi, Ataberk Olgun, Minesh Patel, Haocong Luo, Hasan Hassan, Lois Orosa, Oguz Ergin
HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips. MICRO 2022: 815-834 - [i33]Nisa Bostanci, Ataberk Olgun, Lois Orosa, Abdullah Giray Yaglikçi, Jeremie S. Kim, Hasan Hassan, Oguz Ergin, Onur Mutlu:
DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators. CoRR abs/2201.01385 (2022) - [i32]Ataberk Olgun, Juan Gómez-Luna, Konstantinos Kanellopoulos, Behzad Salami, Hasan Hassan, Oguz Ergin, Onur Mutlu:
PiDRAM: An FPGA-based Framework for End-to-end Evaluation of Processing-in-DRAM Techniques. CoRR abs/2206.00263 (2022) - [i31]Abdullah Giray Yaglikçi, Haocong Luo, Geraldo F. de Oliviera, Ataberk Olgun, Minesh Patel, Jisung Park
Understanding RowHammer Under Reduced Wordline Voltage: An Experimental Study Using Real DRAM Devices. CoRR abs/2206.09999 (2022) - [i30]Hasan Hassan, Ataberk Olgun, Abdullah Giray Yaglikçi, Haocong Luo, Onur Mutlu:
A Case for Self-Managing DRAM Chips: Improving Performance, Efficiency, Reliability, and Security via Autonomous in-DRAM Maintenance Operations. CoRR abs/2207.13358 (2022) - [i29]Ataberk Olgun, F. Nisa Bostanci, Geraldo F. Oliveira, Yahya Can Tugrul, Rahul Bera, Abdullah Giray Yaglikçi, Hasan Hassan, Oguz Ergin, Onur Mutlu:
Sectored DRAM: An Energy-Efficient High-Throughput and Practical Fine-Grained DRAM Architecture. CoRR abs/2207.13795 (2022) - [i28]Abdullah Giray Yaglikçi, Ataberk Olgun, Minesh Patel, Haocong Luo, Hasan Hassan, Lois Orosa
HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips. CoRR abs/2209.10198 (2022) - [i27]Ataberk Olgun, Hasan Hassan, Abdullah Giray Yaglikçi, Yahya Can Tugrul, Lois Orosa
DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM Chips. CoRR abs/2211.05838 (2022) - 2021
- [j7]Syed Mohammad Asad Hassan Jafri, Hasan Hassan, Ahmed Hemani, Onur Mutlu:
Refresh Triggered Computation: Improving the Energy Efficiency of Convolutional Neural Network Accelerators. ACM Trans. Archit. Code Optim. 18(1): 2:1-2:29 (2021) - [c23]Abdullah Giray Yaglikçi
BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows. HPCA 2021: 345-358 - [c22]Lois Orosa
CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations. ISCA 2021: 484-497 - [c21]Lois Orosa
A Deeper Look into RowHammer's Sensitivities: Experimental Analysis of Real DRAM Chipsand Implications on Future Attacks and Defenses. MICRO 2021: 1182-1197 - [c20]Hasan Hassan, Yahya Can Tugrul, Jeremie S. Kim, Victor van der Veen, Kaveh Razavi, Onur Mutlu:
Uncovering In-DRAM RowHammer Protection Mechanisms: A New Methodology, Custom RowHammer Patterns, and Implications. MICRO 2021: 1198-1213 - [i26]Abdullah Giray Yaglikçi, Minesh Patel, Jeremie S. Kim, Roknoddin Azizi, Ataberk Olgun, Lois Orosa, Hasan Hassan, Jisung Park, Konstantinos Kanellopoulos, Taha Shahroodi, Saugata Ghose, Onur Mutlu:
BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows. CoRR abs/2102.05981 (2021) - [i25]Nandita Vijaykumar, Ataberk Olgun, Konstantinos Kanellopoulos, Nisa Bostanci, Hasan Hassan, Mehrshad Lotfi, Phillip B. Gibbons, Onur Mutlu:
MetaSys: A Practical Open-Source Metadata Management System to Implement and Evaluate Cross-Layer Optimizations. CoRR abs/2105.08123 (2021) - [i24]Lois Orosa, Yaohua Wang, Mohammad Sadrosadati, Jeremie S. Kim, Minesh Patel, Ivan Puddu, Haocong Luo, Kaveh Razavi, Juan Gómez-Luna, Hasan Hassan, Nika Mansouri-Ghiasi, Saugata Ghose, Onur Mutlu:
CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations. CoRR abs/2106.05632 (2021) - [i23]Lois Orosa, Abdullah Giray Yaglikçi, Haocong Luo, Ataberk Olgun, Jisung Park, Hasan Hassan, Minesh Patel, Jeremie S. Kim, Onur Mutlu:
A Deeper Look into RowHammer's Sensitivities: Experimental Analysis of Real DRAM Chips and Implications on Future Attacks and Defenses. CoRR abs/2110.10291 (2021) - [i22]Hasan Hassan, Yahya Can Tugrul, Jeremie S. Kim, Victor van der Veen, Kaveh Razavi, Onur Mutlu:
Uncovering In-DRAM RowHammer Protection Mechanisms: A New Methodology, Custom RowHammer Patterns, and Implications. CoRR abs/2110.10603 (2021) - [i21]Ataberk Olgun, Juan Gómez-Luna, Konstantinos Kanellopoulos, Behzad Salami, Hasan Hassan, Oguz Ergin, Onur Mutlu:
PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM. CoRR abs/2111.00082 (2021) - 2020
- [c19]Jeremie S. Kim, Minesh Patel, Abdullah Giray Yaglikçi
Revisiting RowHammer: An Experimental Analysis of Modern DRAM Devices and Mitigation Techniques. ISCA 2020: 638-651 - [c18]Haocong Luo, Taha Shahroodi, Hasan Hassan, Minesh Patel, Abdullah Giray Yaglikçi
CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off. ISCA 2020: 666-679 - [c17]Minesh Patel, Jeremie S. Kim, Taha Shahroodi, Hasan Hassan, Onur Mutlu:
Bit-Exact ECC Recovery (BEER): Determining DRAM On-Die ECC Functions by Exploiting DRAM Data Retention Characteristics. MICRO 2020: 282-297 - [c16]Pietro Frigo, Emanuele Vannacci, Hasan Hassan, Victor van der Veen, Onur Mutlu, Cristiano Giuffrida
TRRespass: Exploiting the Many Sides of Target Row Refresh. SP 2020: 747-762 - [i20]Pietro Frigo, Emanuele Vannacci, Hasan Hassan, Victor van der Veen, Onur Mutlu, Cristiano Giuffrida, Herbert Bos, Kaveh Razavi:
TRRespass: Exploiting the Many Sides of Target Row Refresh. CoRR abs/2004.01807 (2020) - [i19]Haocong Luo, Taha Shahroodi, Hasan Hassan, Minesh Patel, Abdullah Giray Yaglikçi, Lois Orosa, Jisung Park, Onur Mutlu:
CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off. CoRR abs/2005.12775 (2020) - [i18]Jeremie S. Kim, Minesh Patel, Abdullah Giray Yaglikçi, Hasan Hassan, Roknoddin Azizi, Lois Orosa, Onur Mutlu:
Revisiting RowHammer: An Experimental Analysis of Modern DRAM Devices and Mitigation Techniques. CoRR abs/2005.13121 (2020) - [i17]Minesh Patel, Jeremie S. Kim, Taha Shahroodi, Hasan Hassan, Onur Mutlu:
Bit-Exact ECC Recovery (BEER): Determining DRAM On-Die ECC Functions by Exploiting DRAM Data Retention Characteristics. CoRR abs/2009.07985 (2020)
2010 – 2019
- 2019
- [j6]Mohammed Alser, Hasan Hassan, Akash Kumar
Shouji: a fast and efficient pre-alignment filter for sequence alignment. Bioinform. 35(21): 4255-4263 (2019) - [c15]Minesh Patel, Jeremie S. Kim, Hasan Hassan, Onur Mutlu:
Understanding and Modeling On-Die Error Correction in Modern DRAM: An Experimental Study Using Real Devices. DSN 2019: 13-25 - [c14]Jeremie S. Kim, Minesh Patel, Hasan Hassan, Lois Orosa
D-RaNGe: Using Commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput. HPCA 2019: 582-595 - [c13]Hasan Hassan, Minesh Patel, Jeremie S. Kim, Abdullah Giray Yaglikçi, Nandita Vijaykumar, Nika Mansouri-Ghiasi, Saugata Ghose, Onur Mutlu:
CROW: a low-cost substrate for improving DRAM performance, energy efficiency, and reliability. ISCA 2019: 129-142 - [c12]Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Rachata Ausavarungnirun, Kevin Hsieh
CoNDA: efficient cache coherence support for near-data accelerators. ISCA 2019: 629-642 - [i16]Lois Orosa, Yaohua Wang, Ivan Puddu, Mohammad Sadrosadati, Kaveh Razavi, Juan Gómez-Luna, Hasan Hassan, Nika Mansouri-Ghiasi, Arash Tavakkol, Minesh Patel, Jeremie S. Kim, Vivek Seshadri, Uksong Kang, Saugata Ghose, Rodolfo Azevedo, Onur Mutlu:
Dataplant: In-DRAM Security Mechanisms for Low-Cost Devices. CoRR abs/1902.07344 (2019) - [i15]Syed M. A. H. Jafri, Hasan Hassan, Ahmed Hemani, Onur Mutlu:
Refresh Triggered Computation: Improving the Energy Efficiency of Convolutional Neural Network Accelerators. CoRR abs/1910.06672 (2019) - 2018
- [j5]Jeremie S. Kim, Damla Senol Cali
GRIM-Filter: Fast seed location filtering in DNA read mapping using processing-in-memory technologies. BMC Genom. 19(S2) (2018) - [j4]Saugata Ghose, Abdullah Giray Yaglikçi, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor
What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study. Proc. ACM Meas. Anal. Comput. Syst. 2(3): 38:1-38:41 (2018) - [c11]Anup Das
VRL-DRAM: improving DRAM performance via variable refresh latency. DAC 2018: 171:1-171:6 - [c10]Jeremie S. Kim, Minesh Patel, Hasan Hassan, Onur Mutlu:
The DRAM Latency PUF: Quickly Evaluating Physical Unclonable Functions by Exploiting the Latency-Reliability Tradeoff in Modern Commodity DRAM Devices. HPCA 2018: 194-207 - [c9]Jeremie S. Kim, Minesh Patel, Hasan Hassan, Onur Mutlu:
Solar-DRAM: Reducing DRAM Access Latency by Exploiting the Variation in Local Bitlines. ICCD 2018: 282-291 - [c8]Yaohua Wang, Arash Tavakkol, Lois Orosa
Reducing DRAM Latency via Charge-Level-Aware Look-Ahead Partial Restoration. MICRO 2018: 298-311 - [c7]Saugata Ghose, Abdullah Giray Yaglikçi, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor
What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study. SIGMETRICS (Abstracts) 2018: 110 - [i14]Kevin K. Chang, Abhijith Kashyap, Hasan Hassan, Saugata Ghose, Kevin Hsieh, Donghyuk Lee, Tianshi Li
Flexible-Latency DRAM: Understanding and Exploiting Latency Variation in Modern DRAM Chips. CoRR abs/1805.03154 (2018) - [i13]Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu:
Voltron: Understanding and Exploiting the Voltage-Latency-Reliability Trade-Offs in Modern DRAM Chips to Improve Energy Efficiency. CoRR abs/1805.03175 (2018) - [i12]Hasan Hassan, Nandita Vijaykumar, Samira Manabi Khan, Saugata Ghose, Kevin K. Chang, Gennady Pekhimenko, Donghyuk Lee, Oguz Ergin, Onur Mutlu:
SoftMC: Practical DRAM Characterization Using an FPGA-Based Infrastructure. CoRR abs/1805.03195 (2018) - [i11]Hasan Hassan, Gennady Pekhimenko, Nandita Vijaykumar, Vivek Seshadri, Donghyuk Lee, Oguz Ergin, Onur Mutlu:
Exploiting Row-Level Temporal Locality in DRAM to Reduce the Memory Access Latency. CoRR abs/1805.03969 (2018) - [i10]Saugata Ghose, Abdullah Giray Yaglikçi, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor, Onur Mutlu:
What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study. CoRR abs/1807.05102 (2018) - [i9]Jeremie S. Kim, Minesh Patel, Hasan Hassan, Lois Orosa, Onur Mutlu:
D-RaNGe: Violating DRAM Timing Constraints for High-Throughput True Random Number Generation using Commodity DRAM Devices. CoRR abs/1808.04286 (2018) - [i8]Mohammed Alser, Hasan Hassan, Akash Kumar, Onur Mutlu, Can Alkan:
SLIDER: Fast and Efficient Computation of Banded Sequence Alignment. CoRR abs/1809.07858 (2018) - [i7]Arash Tavakkol, Aasheesh Kolli, Stanko Novakovic, Kaveh Razavi, Juan Gómez-Luna, Hasan Hassan, Claude Barthels, Yaohua Wang, Mohammad Sadrosadati, Saugata Ghose, Ankit Singla, Pratap Subrahmanyam, Onur Mutlu:
Enabling Efficient RDMA-based Synchronous Mirroring of Persistent Memory Transactions. CoRR abs/1810.09360 (2018) - 2017
- [j3]Mohammed Alser, Hasan Hassan, Hongyi Xin
GateKeeper: a new hardware architecture for accelerating pre-alignment in DNA short read mapping. Bioinform. 33(21): 3355-3363 (2017) - [j2]Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Kevin Hsieh
LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory. IEEE Comput. Archit. Lett. 16(1): 46-50 (2017) - [j1]Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu:
Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms. Proc. ACM Meas. Anal. Comput. Syst. 1(1): 10:1-10:42 (2017) - [c6]Hasan Hassan, Nandita Vijaykumar, Samira Manabi Khan, Saugata Ghose, Kevin K. Chang, Gennady Pekhimenko, Donghyuk Lee, Oguz Ergin
SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies. HPCA 2017: 241-252 - [c5]Vivek Seshadri, Donghyuk Lee, Thomas Mullins, Hasan Hassan, Amirali Boroumand, Jeremie S. Kim, Michael A. Kozuch, Onur Mutlu, Phillip B. Gibbons, Todd C. Mowry:
Ambit: in-memory accelerator for bulk bitwise operations using commodity DRAM technology. MICRO 2017: 273-287 - [c4]Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor
Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms. SIGMETRICS (Abstracts) 2017: 52 - [i6]Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu:
Understanding Reduced-Voltage Operation in Modern DRAM Chips: Characterization, Analysis, and Mechanisms. CoRR abs/1705.10292 (2017) - [i5]Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Nastaran Hajinazar, Kevin Hsieh, Krishna T. Malladi, Hongzhong Zheng, Onur Mutlu:
LazyPIM: Efficient Support for Cache Coherence in Processing-in-Memory Architectures. CoRR abs/1706.03162 (2017) - [i4]Jeremie S. Kim, Damla Senol Cali, Hongyi Xin, Donghyuk Lee, Saugata Ghose, Mohammed Alser, Hasan Hassan, Oguz Ergin, Can Alkan, Onur Mutlu:
GRIM-Filter: Fast Seed Location Filtering in DNA Read Mapping Using Processing-in-Memory Technologies. CoRR abs/1711.01177 (2017) - 2016
- [c3]Hasan Hassan, Gennady Pekhimenko, Nandita Vijaykumar, Vivek Seshadri, Donghyuk Lee, Oguz Ergin
ChargeCache: Reducing DRAM latency by exploiting row access locality. HPCA 2016: 581-593 - [c2]Kevin K. Chang, Abhijith Kashyap, Hasan Hassan, Saugata Ghose, Kevin Hsieh
Understanding Latency Variation in Modern DRAM Chips: Experimental Characterization, Analysis, and Optimization. SIGMETRICS 2016: 323-336 - [i3]Mohammed Alser, Hasan Hassan, Hongyi Xin, Oguz Ergin, Onur Mutlu, Can Alkan:
GateKeeper: Enabling Fast Pre-Alignment in DNA Short Read Mapping with a New Streaming Accelerator Architecture. CoRR abs/1604.01789 (2016) - [i2]Hasan Hassan:
Reducing DRAM Access Latency by Exploiting DRAM Leakage Characteristics and Common Access Patterns. CoRR abs/1609.07234 (2016) - [i1]Vivek Seshadri, Donghyuk Lee, Thomas Mullins, Hasan Hassan, Amirali Boroumand, Jeremie S. Kim, Michael A. Kozuch, Onur Mutlu, Phillip B. Gibbons, Todd C. Mowry:
Buddy-RAM: Improving the Performance and Efficiency of Bulk Bitwise Operations Using DRAM. CoRR abs/1611.09988 (2016) - 2014
- [c1]Mustafa Cavus, Hakki Doganer Sumerkan, Osman Seckin Simsek, Hasan Hassan, Abdullah Giray Yaglikçi, Oguz Ergin
GPU based Parallel Image Processing Library for Embedded Systems. VISAPP (1) 2014: 234-241
Coauthor Index
[j11] [c28] [j10] [j9] [j8] [c27] [c26] [c25] [c24] [i33] [i32] [i31] [i30] [i29] [i28] [i27] [j7] [c23] [c22] [c21] [c20] [i26] [i25] [i24] [i23] [i22] [i21] [c19] [c18] [c17] [c16] [i20] [i19] [i18] [i17] [j6] [c15] [c14] [c13] [c12] [i16] [i15] [j5] [j4] [c11] [c10] [c9] [c8] [c7] [i14] [i13] [i12] [i11] [i10] [i9] [i8] [i7] [j3] [j2] [j1] [c6] [c5] [c4] [i6] [i5] [i4] [c3] [c2] [i3] [i1]
A. Giray Yaglikçi
aka: Abdullah Giray Yaglikçi
aka: Abdullah Giray Yaglikçi
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