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Trevor Bauer

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2020 – today

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2020
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  dblp key:
  - conf/hotchips/VoogelFOCADMDTW20
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Martin Voogel, Yohan Frans, Matt Ouellette, Jason Coppens, Sagheer Ahmad, Jaideep Dastidar, Ehab Mohsen, Faisal Dada, Mike Thompson, Ralph Wittig, Trevor Bauer, Gaurav Singh:
Xilinx Versal™ Premium. Hot Chips Symposium 2020: 1-46

2010 – 2019

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2019
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Brian Gaide, Dinesh Gaitonde, Chirag Ravishankar, Trevor Bauer:
Xilinx Adaptive Compute Acceleration Platform: Versal^TM Architecture. FPGA 2019: 84-93
2018
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Chirag Ravishankar, Dinesh Gaitonde, Trevor Bauer:
Placement Strategies for 2.5D FPGA Fabric Architectures. FPL 2018: 16-20
2015
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Shant Chandrakar, Dinesh Gaitonde, Trevor Bauer:
Enhancements in UltraScale CLB Architecture. FPGA 2015: 108-116

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