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Yasuaki Ito
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2020 – today
- 2024
- [j56]Xiaotian Li
, Koji Nakano
Bit duplication technique to generate hard quadratic unconstrained binary optimization problems with adjustable sizes. Concurr. Comput. Pract. Exp. 36(10) (2024) - [j55]Yasuaki Ito
Directional cooperative networks. Neurocomputing 593: 127788 (2024) - [j54]Xiaotian Li
Generating hard quadratic unconstrained binary optimization instances via the method of combining bit reduction and duplication technique. Int. J. Parallel Emergent Distributed Syst. 39(5): 589-608 (2024) - [c112]Yasuaki Ito, Satoki Tsuji, Haruto Fujii, Kanta Suzuki, Nobuya Yokogawa, Koji Nakano, Akihiko Kasagi:
Introduction to Computational Quantum Chemistry for Computer Scientists. IPDPS (Workshops) 2024: 273-282 - [i3]Shunsuke Tsukiyama, Koji Nakano, Xiaotian Li, Yasuaki Ito, Takumi Kato, Yuya Kawamata:
Designing Unit Ising Models for Logic Gate Simulation through Integer Linear Programming. CoRR abs/2406.18130 (2024) - 2023
- [j53]Jacir Luiz Bordin, Yasuaki Ito:
International Symposium on Computing and Networking (CANDAR 2019) special issue. Concurr. Comput. Pract. Exp. 35(11) (2023) - [j52]Naoki Matsumura, Yasuaki Ito
A novel structured sparse fully connected layer in convolutional neural networks. Concurr. Comput. Pract. Exp. 35(11) (2023) - [j51]Daisuke Takafuji
Efficient parallel implementations to compute the diameter of a graph. Concurr. Comput. Pract. Exp. 35(11) (2023) - [j50]Tomohiro Imanaga, Koji Nakano
Simple iterative trial search for the maximum independent set problem optimized for the GPUs. Concurr. Comput. Pract. Exp. 35(14) (2023) - [j49]Hiroshi Kagawa, Yasuaki Ito
High-throughput FPGA implementation for quadratic unconstrained binary optimization. Concurr. Comput. Pract. Exp. 35(14) (2023) - [j48]Jiamian Huang, Yasuaki Ito
Graphics processing unit-accelerated high-quality watercolor painting image generation. Concurr. Comput. Pract. Exp. 35(19) (2023) - [j47]Daisuke Takafuji
GPU implementations of deflate encoding and decoding. Concurr. Comput. Pract. Exp. 35(19) (2023) - [c111]Satoki Tsuji, Yasuaki Ito, Koji Nakano, Akihiko Kasagi:
Efficient GPU-Accelerated Bulk Evaluation of the Boys Function for Quantum Chemistry. candar 2023: 49-58 - [c110]Shunsuke Tsukiyama, Koji Nakano, Yasuaki Ito, Takashi Yazane, Junko Yano, Takumi Kato, Shiro Ozaki, Rie Mori, Ryota Katsuki:
Solving the N-Queens Puzzle by a QUBO Model with Quadratic Size. candar 2023: 59-67 - [c109]Koji Nakano
Diverse Adaptive Bulk Search: a Framework for Solving QUBO Problems on Multiple GPUs. IPDPS Workshops 2023: 314-325 - [c108]Yasuaki Ito
Directional Generative Networks; Comparison to Evolutionary Algorithms, Using Measurements for Molecules. JSAI-isAI Workshops 2023: 151-166 - [i2]Koji Nakano
Dual-Matrix Domain-Wall: A Novel Technique for Generating Permutations by QUBO and Ising Models with Quadratic Sizes. CoRR abs/2308.01024 (2023) - 2022
- [j46]Ryota Yasudo
GPU-accelerated scalable solver with bit permutated cyclic-min algorithm for quadratic unconstrained binary optimization. J. Parallel Distributed Comput. 167: 109-122 (2022) - [c107]Koji Nakano
A benchmark QUBO problem inspired by digital halftoning based on the human visual system. CANDAR 2022: 56-65 - [c106]Haiya Huang, Yasuaki Ito, Koji Nakano
A Bokeh Image Generation Technique using Machine Learning. CANDAR 2022: 97-103 - [c105]Hao Su
ConvUNeXt: A Lightweight Convolutional Neural Network for Watercolor Image Translation. CANDARW 2022: 127-133 - [c104]Xiaotian Li
Bit duplication technique to generate hard QUBO problems. CANDARW 2022: 180-184 - [c103]Taiki Sasaki, Yasuaki Ito, Koji Nakano
BERT-Based Scientific Paper Quality Prediction. ICANN (4) 2022: 212-223 - [c102]Yasuaki Ito, Koji Nakano
The Bonsai Hypothesis: An Efficient Network Pruning Technique. AIAI (1) 2022: 229-241 - [c101]Ryota Yasudo, Koji Nakano
Graph-theoretic Formulation of QUBO for Scalable Local Search on GPUs. IPDPS Workshops 2022: 425-434 - [i1]Koji Nakano
Diverse Adaptive Bulk Search: a Framework for Solving QUBO Problems on Multiple GPUs. CoRR abs/2207.03069 (2022) - 2021
- [j45]Naoki Matsumura, Hiroki Tokura, Yuki Kuroda, Yasuaki Ito
Tile art image generation using parallel greedy algorithm on the GPU and its approximation with machine learning. Concurr. Comput. Pract. Exp. 33(12) (2021) - [j44]Takuma Wada, Naoki Matsumura, Ryota Yasudo
Efficient implementations of Bloom filter using block RAMs and DSP slices on the FPGA. Concurr. Comput. Pract. Exp. 33(12) (2021) - [c100]Tomohiro Imanaga, Koji Nakano
Solving the sparse QUBO on multiple GPUs for Simulating a Quantum Annealer. CANDAR 2021: 19-28 - [c99]Jiamian Huang, Yasuaki Ito, Koji Nakano
A GPU Implementation of Watercolor Painting Image Generation. CANDAR (Workshops) 2021: 145-151 - [c98]Daisuke Takafuji, Koji Nakano
Acceleration of Deflate Encoding and Decoding with GPU implementations. CANDAR (Workshops) 2021: 180-186 - [c97]Koji Nakano
On the Computational Power of Convolution Pooling: A Theoretical Approach for Deep Learning. IPDPS Workshops 2021: 656-665 - 2020
- [j43]Lucas Saad Nogueira Nunes, Jacir Luiz Bordim, Yasuaki Ito, Koji Nakano
A Rabin-Karp Implementation for Handling Multiple Pattern-Matching on the GPU. IEICE Trans. Inf. Syst. 103-D(12): 2412-2420 (2020) - [j42]Shunsuke Suita, Takahiro Nishimura, Hiroki Tokura, Koji Nakano
Efficient convolution pooling on the GPU. J. Parallel Distributed Comput. 138: 222-229 (2020) - [c96]Tomohiro Imanaga, Koji Nakano
Efficient GPU Implementation for Solving the Maximum Independent Set Problem. CANDAR 2020: 29-38 - [c95]Hiroshi Kagawa, Yasuaki Ito, Koji Nakano
Fully-Pipelined Architecture for Simulated Annealing-based QUBO Solver on the FPGA. CANDAR 2020: 39-48 - [c94]Ye Yuan, Yasuaki Ito, Koji Nakano
Art Font Image Generation with Conditional Generative Adversarial Networks. CANDAR (Workshops) 2020: 151-156 - [c93]Naoya Yamamoto, Koji Nakano
Huffman Coding with Gap Arrays for GPU Acceleration. ICPP 2020: 1:1-1:11 - [c92]Ryota Yasudo
Adaptive Bulk Search: Solving Quadratic Unconstrained Binary Optimization Problems on Multiple GPUs. ICPP 2020: 62:1-62:11 - [c91]Hiroki Kataoka, Kohei Yamashita, Yasuaki Ito, Koji Nakano
An Efficient Multicore CPU Implementation for Convolution-Pooling Computation in CNNs. IPDPS Workshops 2020: 548-556 - [c90]Masaki Tao, Koji Nakano
A Work-Time Optimal Parallel Exhaustive Search Algorithm for the QUBO and the Ising model, with GPU implementation. IPDPS Workshops 2020: 557-566
2010 – 2019
- 2019
- [j41]Kohei Yamashita, Yasuaki Ito
Bulk execution of the dynamic programming for the optimal polygon triangulation problem on the GPU. Concurr. Comput. Pract. Exp. 31(19) (2019) - [j40]Takahiro Nishimura, Jacir Luiz Bordim, Yasuaki Ito, Koji Nakano
Accelerating the Smith-Waterman Algorithm Using the Bitwise Parallel Bulk Computation Technique on the GPU. IEICE Trans. Inf. Syst. 102-D(12): 2400-2408 (2019) - [c89]Yasuaki Ito, Yoshiho Oda, Takayoshi Narita, Hideaki Kato:
Electromagnetic Levitation System for Thin Steel Plate Using Electromagnets and Permanent Magnets (Fundamental Consideration on Optimal Placement to Suppress the Deflection of Steel Plate). ASCC 2019: 987-990 - [c88]Masatoshi Hayashikawa, Koji Nakano
Folded Bloom Filter for High Bandwidth Memory, with GPU Implementations. CANDAR 2019: 18-27 - [c87]Hiroshi Kagawa, Yasuaki Ito, Koji Nakano
Throughput-Optimal Hardware Implementation of LZW Decompression on the FPGA. CANDAR Workshops 2019: 78-83 - [c86]Daisuke Takafuji, Koji Nakano
Efficient GPU Implementations to Compute the Diameter of a Graph. CANDAR 2019: 102-111 - [c85]Naoki Matsumura, Yasuaki Ito, Koji Nakano
Structured Sparse Fully-Connected Layers in the CNNs and Its GPU Acceleration. CANDAR Workshops 2019: 148-154 - [c84]Hisaki Yamane, Yasuaki Ito, Koji Nakano
A Watercolor Painting Image Generation Using Stroke-Based Rendering. CANDAR Workshops 2019: 465-469 - [c83]Koji Nakano
FIFO-Based Hardware Sorters for High Bandwidth Memory. IPDPS Workshops 2019: 663-672 - [c82]Shunsuke Suita, Takahiro Nishimura, Hiroki Tokura, Koji Nakano
Efficient cuDNN-Compatible Convolution-Pooling on the GPU. PPAM (2) 2019: 46-58 - [c81]Hironobu Kobayashi, Yasuaki Ito
Stained Glass Image Generation Using Voronoi Diagram and Its GPU Acceleration. PPAM (1) 2019: 396-407 - [c80]Takahiro Inoue, Hiroki Tokura, Koji Nakano
Efficient Triangular Matrix Vector Multiplication on the GPU. PPAM (1) 2019: 493-504 - 2018
- [j39]Hiroki Tokura, Toru Fujita, Koji Nakano
Almost optimal column-wise prefix-sum computation on the GPU. J. Supercomput. 74(4): 1510-1521 (2018) - [c79]Takuma Wada, Naoki Matsumura, Koji Nakano
Efficient Byte Stream Pattern Test using Bloom Filter with Rolling Hash Functions on the FPGA. CANDAR 2018: 66-75 - [c78]Lucas Saad N. Nunes, Jacir Luiz Bordim, Yasuaki Ito, Koji Nakano
A Prefix-Sum-Based Rabin-Karp Implementation for Multiple Pattern Matching on GPGPU. CANDAR 2018: 139-145 - [c77]Naoki Matsumura, Hiroki Tokura, Yuki Kuroda, Yasuaki Ito, Koji Nakano
Tile Art Image Generation Using Conditional Generative Adversarial Networks. CANDAR Workshops 2018: 209-215 - [c76]Yutaro Emoto, Shunji Funasaka, Hiroki Tokura, Takumi Honda, Koji Nakano
An Optimal Parallel Algorithm for Computing the Summed Area Table on the GPU. IPDPS Workshops 2018: 763-772 - 2017
- [j38]Hiroaki Kouge, Takumi Honda, Toru Fujita, Yasuaki Ito, Koji Nakano
Accelerating digital halftoning using the local exhaustive search on the GPU. Concurr. Comput. Pract. Exp. 29(2) (2017) - [j37]Daisuke Takafuji, Koji Nakano
C2CU: a CUDA C program generator for bulk execution of a sequential algorithm. Concurr. Comput. Pract. Exp. 29(17) (2017) - [j36]Shunji Funasaka, Koji Nakano
Adaptive loss-less data compression method optimized for GPU decompression. Concurr. Comput. Pract. Exp. 29(24) (2017) - [j35]Toru Fujita, Koji Nakano
An Efficient GPU Implementation of CKY Parsing Using the Bitwise Parallel Bulk Computation Technique. IEICE Trans. Inf. Syst. 100-D(12): 2857-2865 (2017) - [j34]Takumi Honda, Yasuaki Ito, Koji Nakano:
GPU-accelerated Exhaustive Verification of the Collatz Conjecture. Int. J. Netw. Comput. 7(1): 69-85 (2017) - [j33]Hiroki Tokura, Takumi Honda, Yasuaki Ito, Koji Nakano, Mitsuya Nishino, Yushiro Hirota, Masami Saeki:
An Efficient GPU Implementation of Bulk Computation of the Eigenvalue Problem for Many Small Real Non-symmetric Matrices. Int. J. Netw. Comput. 7(2): 227-247 (2017) - [c75]Shunji Funasaka, Koji Nakano
Single Kernel Soft Synchronization Technique for Task Arrays on CUDA-enabled GPUs, with Applications. CANDAR 2017: 11-20 - [c74]Hiroki Tokura, Yuki Kuroda, Yasuaki Ito, Koji Nakano
A Square Pointillism Image Generation, and Its GPU Acceleration. CANDAR 2017: 38-47 - [c73]Takuma Wada, Shunji Funasaka, Koji Nakano
A Hybrid Architecture for the Approximate String Matching on an FPGA. CANDAR 2017: 48-57 - [c72]Takumi Honda, Shinnosuke Yamamoto, Hiroaki Honda, Koji Nakano
Simple and Fast Parallel Algorithms for the Voronoi Map and the Euclidean Distance Map, with GPU Implementations. ICPP 2017: 362-371 - [c71]Takahiro Nishimura, Jacir Luiz Bordim, Yasuaki Ito, Koji Nakano
Accelerating the Smith-Waterman Algorithm Using Bitwise Parallel Bulk Computation Technique on GPU. IPDPS Workshops 2017: 932-941 - [c70]Yi Yang, Yasuaki Ito, Koji Nakano
Photomosaic Generation by Rearranging Subimages, with GPU Acceleration. IPDPS Workshops 2017: 942-951 - [c69]Hiroki Tokura, Toru Fujita, Koji Nakano
Almost Optimal Column-wise Prefix-sum Computation on the GPU. PPAM (2) 2017: 224-233 - [c68]Kohei Yamashita, Yasuaki Ito
A GPU Implementation of Bulk Execution of the Dynamic Programming for the Optimal Polygon Triangulation. PPAM (1) 2017: 314-323 - 2016
- [j32]Tatsuya Kawamoto, Xin Zhou, Jacir Luiz Bordim, Yasuaki Ito, Koji Nakano
An FPGA Implementation for a Flexible-Length-Arithmetic Processor Employing the FDFM Processor Core Approach. IEICE Trans. Inf. Syst. 99-D(12): 2901-2910 (2016) - [j31]Shunji Funasaka, Koji Nakano
Fully Parallelized LZW Decompression for CUDA-Enabled GPUs. IEICE Trans. Inf. Syst. 99-D(12): 2986-2994 (2016) - [j30]Lucas Saad N. Nunes, Jacir Luiz Bordim, Yasuaki Ito, Koji Nakano
A Memory-Access-Efficient Implementation for Computing the Approximate String Matching Algorithm on GPUs. IEICE Trans. Inf. Syst. 99-D(12): 2995-3003 (2016) - [j29]Takumi Honda, Yasuaki Ito, Koji Nakano
GPU-Accelerated Bulk Execution of Multiple-Length Multiplication with Warp-Synchronous Programming Technique. IEICE Trans. Inf. Syst. 99-D(12): 3004-3012 (2016) - [j28]Toru Fujita, Koji Nakano
Fast Simulation of Conway's Game of Life Using Bitwise Parallel Bulk Computation on a GPU. Int. J. Found. Comput. Sci. 27(8): 981- (2016) - [j27]Toru Fujita, Koji Nakano, Yasuaki Ito:
Bulk execution of Euclidean algorithms on the CUDA-enabled GPU. Int. J. Netw. Comput. 6(1): 42-63 (2016) - [j26]Xin Zhou, Koji Nakano, Yasuaki Ito:
Efficient Implementation of FDFM Approach for Euclidean Algorithms on the FPGA. Int. J. Netw. Comput. 6(2): 420-435 (2016) - [j25]Yuji Takeuchi, Koji Nakano
A character art generator using the local exhaustive search, with GPU acceleration. Int. J. Parallel Emergent Distributed Syst. 31(1): 47-63 (2016) - [c67]Ryouhei Murooka, Yasuaki Ito, Koji Nakano:
Accelerating Ant Colony Optimization for the Vertex Coloring Problem on the GPU. CANDAR 2016: 469-475 - [c66]Lucas Saad N. Nunes, Jacir Luiz Bordim, Koji Nakano, Yasuaki Ito:
A Memory-Access-Efficient Implementation of the Approximate String Matching Algorithm on GPU. CANDAR 2016: 483-489 - [c65]Hiroki Tokura, Takumi Honda, Yasuaki Ito, Koji Nakano, Mitsuya Nishino, Yushiro Hirota, Masami Saeki:
GPU-Accelerated Bulk Computation of the Eigenvalue Problem for Many Small Real Non-symmetric Matrices. CANDAR 2016: 490-496 - [c64]Naoaki Harada, Naoyuki Matsumoto, Koji Nakano, Yasuaki Ito:
A Hardware Sorter for Almost Sorted Sequences, with FPGA Implementations. CANDAR 2016: 565-571 - [c63]Keisuke Nakata, Yasuaki Ito:
An Evaluation of the Parallella Architecture for the Convex Hull Computation. CANDAR 2016: 704-706 - [c62]Shunji Funasaka, Koji Nakano
Light Loss-Less Data Compression, with GPU Implementation. ICA3PP 2016: 281-294 - [c61]Xin Zhou, Yasuaki Ito, Koji Nakano
An Efficient Implementation of LZW Compression in the FPGA. ICA3PP 2016: 512-520 - [c60]Toru Fujita, Koji Nakano
Bitwise Parallel Bulk Computation on the GPU, with Application to the CKY Parsing for Context-Free Grammars. IPDPS Workshops 2016: 589-598 - [c59]Xin Zhou, Yasuaki Ito, Koji Nakano
An Efficient Implementation of LZW Decompression in the FPGA. IPDPS Workshops 2016: 599-607 - 2015
- [c58]Toru Fujita, Daigo Nishikori, Koji Nakano
Efficient GPU Implementations for the Conway's Game of Life. CANDAR 2015: 11-20 - [c57]Akihiko Kasagi, Koji Nakano
Parallelization Techniques for Error Diffusion with GPU Implementations. CANDAR 2015: 30-39 - [c56]Takumi Honda, Yasuaki Ito, Koji Nakano
A Warp-Synchronous Implementation for Multiple-Length Multiplication on the GPU. CANDAR 2015: 96-102 - [c55]Lucas Saad N. Nunes, Jacir Luiz Bordim, Koji Nakano
A Fast Approximate String Matching Algorithm on GPU. CANDAR 2015: 188-192 - [c54]Shunji Funasaka, Koji Nakano
Fast LZW Compression Using a GPU. CANDAR 2015: 303-308 - [c53]Tatsuya Kawamoto, Yasuaki Ito, Koji Nakano
A Flexible-Length-Arithmetic Processor Based on FDFM Approach in FPGAs. CANDAR 2015: 364-370 - [c52]Toru Fujita, Koji Nakano
Bulk GCD Computation Using a GPU to Break Weak RSA Keys. IPDPS Workshops 2015: 385-394 - [c51]Hiroaki Kouge, Yasuaki Ito, Koji Nakano
GPU-Accelerated Digital Halftoning by the Local Exhaustive Search. ISPDC 2015: 82-89 - [c50]Naoyuki Matsumoto, Koji Nakano
Optimal Parallel Hardware K-Sorter and Top K-Sorter, with FPGA Implementations. ISPDC 2015: 138-147 - [c49]Koji Nakano
Optimality of Fundamental Parallel Algorithms on the Hierarchical Memory Machine, with GPU Implementation. PDP 2015: 626-634 - [c48]Shunji Funasaka, Koji Nakano
A Parallel Algorithm for LZW Decompression, with GPU Implementation. PPAM (1) 2015: 228-237 - [c47]Xin Zhou, Koji Nakano
Parallel FDFM Approach for Computing GCDs Using the FPGA. PPAM (1) 2015: 238-247 - 2014
- [j24]Akihiko Kasagi, Koji Nakano
Offline Permutation on the CUDA-enabled GPU. IEICE Trans. Inf. Syst. 97-D(12): 3052-3062 (2014) - [j23]Duhu Man, Koji Nakano
An Optimal Implementation of the Approximate String Matching on the Hierarchical Memory Machine, with Performance Evaluation on the GPU. IEICE Trans. Inf. Syst. 97-D(12): 3063-3071 (2014) - [j22]Xin Zhou, Norihiro Tomagou, Yasuaki Ito, Koji Nakano:
Implementations of the Hough Transform on the Embedded Multicore Processors. Int. J. Netw. Comput. 4(1): 174-188 (2014) - [j21]Akihiro Uchida, Yasuaki Ito, Koji Nakano
Accelerating ant colony optimisation for the travelling salesman problem on the GPU. Int. J. Parallel Emergent Distributed Syst. 29(4): 401-420 (2014) - [c46]Xin Zhou, Yasuaki Ito, Koji Nakano
An Efficient Implementation of the One-Dimensional Hough Transform Algorithm for Circle Detection on the FPGA. CANDAR 2014: 447-452 - [c45]Satoshi Okamoto, Yasuaki Ito, Koji Nakano
Thorough Evaluation of GPU Shared Memory Load and Store Instructions. CANDAR 2014: 614-616 - [c44]Hiroaki Koge, Yasuaki Ito, Koji Nakano
A GPU Implementation of Clipping-Free Halftoning Using the Direct Binary Search. ICA3PP (1) 2014: 57-70 - [c43]Daisuke Takafuji, Koji Nakano
C2CU : A CUDA C Program Generator for Bulk Execution of a Sequential Algorithm. ICA3PP (2) 2014: 178-191 - [c42]Takumi Honda, Yasuaki Ito, Koji Nakano
GPU-Accelerated Verification of the Collatz Conjecture. ICA3PP (1) 2014: 483-496 - [c41]Akihiko Kasagi, Koji Nakano
Parallel Algorithms for the Summed Area Table on the Asynchronous Hierarchical Memory Machine, with GPU implementations. ICPP 2014: 251-260 - [c40]Koji Nakano
Random Address Permute-Shift Technique for the Shared Memory on GPUs. ICPP Workshops 2014: 429-438 - [c39]Kazuya Tani, Daisuke Takafuji, Koji Nakano
Bulk Execution of Oblivious Algorithms on the Unified Memory Machine, with GPU Implementation. IPDPS Workshops 2014: 586-595 - [c38]Xin Zhou, Yasuaki Ito, Koji Nakano
An Efficient Implementation of the Gradient-Based Hough Transform Using DSP Slices and Block RAMs on the FPGA. IPDPS Workshops 2014: 762-770 - 2013
- [j20]Yasuaki Ito
A GPU Implementation of Dynamic Programming for the Optimal Polygon Triangulation. IEICE Trans. Inf. Syst. 96-D(12): 2596-2603 (2013) - [j19]Akihiko Kasagi, Koji Nakano
Offline Permutation Algorithms on the Discrete Memory Machine with Performance Evaluation on the GPU. IEICE Trans. Inf. Syst. 96-D(12): 2617-2625 (2013) - [j18]Yasuaki Ito, Sayaka Kamei:
Preface. Int. J. Netw. Comput. 3(2): 181 (2013) - [j17]Yuki Ago, Yasuaki Ito, Koji Nakano
An FPGA implementation for neural networks with the FDFM processor core approach. Int. J. Parallel Emergent Distributed Syst. 28(4): 308-320 (2013) - [j16]Duhu Man, Kenji Uda, Yasuaki Ito, Koji Nakano
Accelerating computation of Euclidean distance map using the GPU with efficient memory access. Int. J. Parallel Emergent Distributed Syst. 28(5): 383-406 (2013) - [c37]Md. Nazrul Islam Mondal, Kohan Sai, Koji Nakano
A Flexible-Length-Arithmetic Processor Using Embedded DSP Slices and Block RAMs in FPGAs. CANDAR 2013: 75-84 - [c36]Koji Nakano
The Random Address Shift to Reduce the Memory Access Congestion on the Discrete Memory Machine. CANDAR 2013: 95-103 - [c35]Yuji Takeuchi, Daisuke Takafuji, Yasuaki Ito, Koji Nakano
ASCII Art Generation Using the Local Exhaustive Search on the GPU. CANDAR 2013: 194-200 - [c34]Kaoru Hashimoto, Yasuaki Ito, Koji Nakano
Template Matching Using DSP Slices on the FPGA. CANDAR 2013: 338-344 - [c33]Ryosuke Nakamura, Yasuaki Ito, Koji Nakano
TinyCSE: Tiny Computer System for Education. CANDAR 2013: 639-641 - [c32]Akihiko Kasagi, Koji Nakano
An Optimal Offline Permutation Algorithm on the Hierarchical Memory Machine, with the GPU Implementation. ICPP 2013: 1-10 - [c31]Xin Zhou, Norihiro Tomagou, Yasuaki Ito, Koji Nakano
Efficient Hough Transform on the FPGA using DSP Slices and Block RAMs. IPDPS Workshops 2013: 771-778 - 2012
- [j15]Yasuaki Ito, Koji Nakano, Bo Song:
The Parallel FDFM Processor Core Approach for CRT-based RSA Decryption. Int. J. Netw. Comput. 2(1): 79-96 (2012) - [j14]Yasuaki Ito, Sayaka Kamei:
Preface. Int. J. Netw. Comput. 2(2): 216 (2012) - [j13]Md. Nazrul Islam Mondal, Koji Nakano, Yasuaki Ito:
A Rewriting Approach to Replace Asynchronous ROMs with Synchronous Ones for the Circuits with Cycles. Int. J. Netw. Comput. 2(2): 269-290 (2012) - [c30]Akihiro Uchida, Yasuaki Ito, Koji Nakano
An Efficient GPU Implementation of Ant Colony Optimization for the Traveling Salesman Problem. ICNC 2012: 94-102 - [c29]Akihiko Kasagi, Koji Nakano
An Implementation of Conflict-Free Offline Permutation on the GPU. ICNC 2012: 226-232 - [c28]Edans Flavius de Oliveira Sandes, Jacir Luiz Bordim, Alba Cristina Magalhaes Alves de Melo
Record Route Elimination (RRE): An Energy-Efficient Broadcast Algorithm. ICNC 2012: 247-253 - [c27]Kazufumi Nishida, Koji Nakano
Accelerating the Dynamic Programming for the Optimal Polygon Triangulation on the GPU. ICA3PP (1) 2012: 1-15 - 2011
- [j12]Md. Nazrul Islam Mondal, Koji Nakano
A Graph Rewriting Approach for Converting Asynchronous ROMs into Synchronous Ones. IEICE Trans. Inf. Syst. 94-D(12): 2378-2388 (2011) - [j11]Duhu Man, Yasuaki Ito
An Efficient Parallel Sorting Compatible with the Standard Qsort. Int. J. Found. Comput. Sci. 22(5): 1057-1071 (2011) - [j10]Yasuaki Ito, Koji Nakano:
Efficient Exhaustive Verification of the Collatz Conjecture using DSP blocks of Xilinx FPGAs. Int. J. Netw. Comput. 1(1): 49-62 (2011) - [j9]Yasuaki Ito, Sayaka Kamei:
Preface. Int. J. Netw. Comput. 1(2): 131 (2011) - [j8]Duhu Man, Kenji Uda, Hironobu Ueyama, Yasuaki Ito, Koji Nakano:
Implementations of a Parallel Algorithm for Computing Euclidean Distance Map in Multicore Processors and GPUs. Int. J. Netw. Comput. 1(2): 260-276 (2011) - [j7]Bo Song, Kensuke Kawakami, Koji Nakano, Yasuaki Ito:
An RSA Encryption Hardware Algorithm using a Single DSP Block and a Single Block RAM on the FPGA. Int. J. Netw. Comput. 1(2): 277-289 (2011) - [c26]Duhu Man, Kenji Uda, Yasuaki Ito, Koji Nakano
A GPU Implementation of Computing Euclidean Distance Map with Efficient Memory Access. ICNC 2011: 68-76 - [c25]Md. Nazrul Islam Mondal, Koji Nakano
An Algorithm to Remove Asynchronous ROMs in Circuits with Cycles. ICNC 2011: 77-86 - [c24]Yuki Ago, Atsuo Inoue, Koji Nakano
The Parallel FDFM Processor Core Approach for Neural Networks. ICNC 2011: 113-119 - [c23]Akihiro Uchida, Yasuaki Ito, Koji Nakano
Fast and Accurate Template Matching Using Pixel Rearrangement on the GPU. ICNC 2011: 153-159 - [c22]Yasuaki Ito, Kohei Ogawa, Koji Nakano
Fast Ellipse Detection Algorithm Using Hough Transform on the GPU. ICNC 2011: 313-319 - [c21]Kazufumi Nishida, Yasuaki Ito, Koji Nakano
Accelerating the Dynamic Programming for the Matrix Chain Product on the GPU. ICNC 2011: 320-326 - [c20]Bo Song, Yasuaki Ito, Koji Nakano
CRT-Based DSP Decryption Using Montgomery Modular Multiplication on the FPGA. IPDPS Workshops 2011: 532-541 - 2010
- [j6]Yasuaki Ito
Low-Latency Connected Component Labeling Using an FPGA. Int. J. Found. Comput. Sci. 21(3): 405-425 (2010) - [c19]Duhu Man, Kenji Uda, Hironobu Ueyama, Yasuaki Ito, Koji Nakano
Implementations of Parallel Computation of Euclidean Distance Map in Multicore Processors and GPUs. ICNC 2010: 120-127 - [c18]Bo Song, Kensuke Kawakami, Koji Nakano
An RSA Encryption Hardware Algorithm Using a Single DSP Block and a Single Block RAM on the FPGA. ICNC 2010: 140-147 - [c17]Md. Nazrul Islam Mondal, Koji Nakano
A Rewriting Algorithm to Generate AROM-free Fully Synchronous Circuits. ICNC 2010: 148-155 - [c16]Kohei Ogawa, Yasuaki Ito, Koji Nakano
Efficient Canny Edge Detection Using a GPU. ICNC 2010: 279-280 - [c15]Yasuaki Ito, Koji Nakano
Efficient exhaustive verification of the Collatz conjecture using DSP48E blocks of Xilinx Virtex-5 FPGAs. IPDPS Workshops 2010: 1-8
2000 – 2009
- 2009
- [c14]Yasuaki Ito, Koji Nakano
A Hardware-Software Cooperative Approach for the Exhaustive Verification of the Collatz Conjecture. ISPA 2009: 63-70 - [c13]Masaya Nakagawa, Duhu Man, Yasuaki Ito, Koji Nakano
A Simple Parallel Convex Hulls Algorithm for Sorted Points and the Performance Evaluation on the Multicore Processors. PDCAT 2009: 506-511 - [c12]Duhu Man, Yasuaki Ito, Koji Nakano
An Efficient Parallel Sorting Compatible with the Standard qsort. PDCAT 2009: 512-517 - 2008
- [j5]Yasuaki Ito, Koji Nakano
A New FM Screening Method to Generate Cluster-Dot Binary Images Using the Local Exhaustive Search with FPGA Acceleration. Int. J. Found. Comput. Sci. 19(6): 1373-1386 (2008) - [c11]Koji Nakano
A Tiny Processing System for Education and Small Embedded Systems on the FPGAs. EUC (2) 2008: 472-479 - [c10]Koji Nakano
Processor, Assembler, and Compiler Design Education Using an FPGA. ICPADS 2008: 723-728 - [c9]Yasuaki Ito, Koji Nakano
Component labeling for k-concave binary images using an FPGA. IPDPS 2008: 1-8 - [c8]Ryoichi Suzuki, Yasuaki Ito, Nobuaki Kobayashi:
Disturbance estimation by observer-based stabilizing controller with simplified design and its applications to teleoperation. MFI 2008: 510-515 - [c7]Yasuaki Ito, Koji Nakano
Optimized Component Labeling Algorithm for Using in Medium Sized FPGAs. PDCAT 2008: 171-176 - 2007
- [j4]Yasuaki Ito, Koji Nakano
Efficient Hardware Algorithms for n Choose k Counters Using the Bitonic Merger. Int. J. Found. Comput. Sci. 18(3): 517-528 (2007) - [c6]Yasuaki Ito, Koji Nakano
Cluster-dot Screening by Local Exhaustive Search with Hardware Accelaration. IPDPS 2007: 1-8 - 2006
- [j3]Jacir Luiz Bordim, Yasuaki Ito
An Energy Efficient Leader Election Protocol for Radio Network with a Single Transceiver. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 89-A(5): 1355-1361 (2006) - [c5]Yasuaki Ito, Koji Nakano
Efficient hardware algorithms for n choose k counters. IPDPS 2006 - [c4]Jacir Luiz Bordim, Yasuaki Ito, Koji Nakano
Randomized Leader Election Protocols in Noisy Radio Networks with a Single Transceiver. ISPA 2006: 246-256 - 2005
- [j2]Yasuaki Ito, Koji Nakano
FM Screening By The Local Exhaustive Search, With Hardware Acceleration. Int. J. Found. Comput. Sci. 16(1): 89-104 (2005) - 2004
- [j1]Jacir Luiz Bordim, Oscar H. Ibarra, Yasuaki Ito, Koji Nakano
Instance-Specific Solutions For Accelerating The Cky Parsing Of Large Context-Free Grammars. Int. J. Found. Comput. Sci. 15(2): 403-415 (2004) - [c3]Yasuaki Ito, Koji Nakano:
FM Screening by the Local Exhaustive Search, with Hardware Acceleration. IPDPS 2004 - 2003
- [c2]Jacir Luiz Bordim, Yasuaki Ito, Koji Nakano:
Instance-Specific Solutions to Accelerate the CKY Parsing. Engineering of Reconfigurable Systems and Algorithms 2003: 72-80 - 2002
- [c1]Jacir Luiz Bordim, Yasuaki Ito, Koji Nakano
Accelerating the CKY Parsing Using FPGAs. HiPC 2002: 41-51
Coauthor Index
[j56] [j54] [c112] [i3] [j52] [j51] [j50] [j49] [j48] [j47] [c111] [c110] [c109] [i2] [j46] [c107] [c106] [c105] [c104] [c103] [c102] [c101] [i1] [j45] [j44] [c100] [c99] [c98] [c97] [j43] [j42] [c96] [c95] [c94] [c93] [c92] [c91] [c90] [j41] [j40] [c88] [c87] [c86] [c85] [c84] [c83] [c82] [c81] [c80] [j39] [c79] [c78] [c77] [c76] [j38] [j37] [j36] [j35] [j34] [j33] [c75] [c74] [c73] [c72] [c71] [c70] [c69] [c68] [j32] [j31] [j30] [j29] [j28] [j27] [j26] [j25] [c67] [c66] [c65] [c64] [c62] [c61] [c60] [c59] [c58] [c57] [c56] [c55] [c54] [c53] [c52] [c51] [c50] [c49] [c48] [c47] [j24] [j23] [j22] [j21] [c46] [c45] [c44] [c43] [c42] [c41] [c40] [c39] [c38] [j20] [j19] [j17] [j16] [c37] [c36] [c35] [c34] [c33] [c32] [c31] [j15] [j13] [c30] [c29] [c27] [j12] [j11] [j10] [j8] [j7] [c26] [c25] [c24] [c23] [c22] [c21] [c20] [j6] [c19] [c18] [c17] [c16] [c15] [c14] [c13] [c12] [j5] [c11] [c10] [c9] [c7] [j4] [c6] [j3] [c5] [c4] [j2] [j1] [c3] [c2] [c1]
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