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Yuan Liang 0004
Person information
- affiliation: Nanyang Technological University, School of Electrical and Electronic Engineering, Singapore
Other persons with the same name
- Yuan Liang — disambiguation page
- Yuan Liang 0001
— University of California, Department of Electrical Engineering, Los Angeles, CA, USA
- Yuan Liang 0002
- Yuan Liang 0003
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2020 – today
- 2024
- [j6]Yiqian Shan, Yuan Liang
Review of recent progress on solid-state millimeter-wave and terahertz signal sources. Int. J. Circuit Theory Appl. 52(1): 439-472 (2024) - 2023
- [j5]Qian Chen
A Single-Channel Voltage-Scalable 8-GS/s 8-b >37.5-dB SNDR Time-Domain ADC With Asynchronous Pipeline Successive Approximation in 28-nm CMOS. IEEE J. Solid State Circuits 58(6): 1610-1622 (2023) - [j4]Ke Yang, Yuan Liang
On-chip SRR and CSRR for millimeter-wave integrated systems: Review and applications. Microelectron. J. 131: 105664 (2023) - [c10]Oian Chen, Yuan Liang
A Single-Channel 10GS/s 8b>36.4d8 SNDR Time-Domain ADC Featuring Loop-Unrolled Asynchronous Successive Approximation in 28nm CMOS. ISSCC 2023: 278-279 - 2022
- [j3]Qian Chen
A 0.6 V 4 GS/s -56.4 dB THD Voltage-to-Time Converter in 28 nm CMOS. IEEE Access 10: 88558-88566 (2022) - 2021
- [j2]Ao Zhou
A Low-Power Quadrature LO Generator With Mutual Power-Supply Rejection Technique. IEEE Access 9: 137241-137248 (2021) - [c9]Yuan Liang
Millimetre-Wave and Terahertz Antennas and Directional Coupler Enabled by Wafer-Level Packaging Platform with Interposer. ISCAS 2021: 1-5 - 2020
- [c8]Qian Chen, Yuan Liang, Bongjin Kim, Chirn Chye Boon:
A 3GS/s Highly Linear Energy Efficient Constant-Slope Based Voltage-to-Time Converter. ISCAS 2020: 1-5 - [c7]Qian Chen, Chirn Chye Boon, Xueyong Zhang
Multi-Channel FSK Inter/Intra-Chip Communication by Exploiting Field-Confined Slow-Wave Transmission Line. ISCAS 2020: 1-5 - [c6]Qian Chen, Yuan Liang, Chirn Chye Boon:
A 6bit 1.2GS/s Symmetric Successive Approximation Energy-Efficient Time-to-Digital Converter in 40nm CMOS. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j1]Yuan Liang
Design and Analysis of $D$ -Band On-Chip Modulator and Signal Source Based on Split-Ring Resonator. IEEE Trans. Very Large Scale Integr. Syst. 27(7): 1513-1526 (2019) - 2018
- [c5]Yuan Liang, Hao Yu, Chirn Chye Boon, Chenyang Li, Dietmar Kissinger, Yong Wang:
D-Band Surface-Wave Modulator and Signal Source with 40 dB Extinction Ratio and 3.7mW Output Power in 65 nm CMOS. ESSCIRC 2018: 142-145 - 2016
- [c4]Zichuan Liu, Yuan Liang, Nan Li, Guangyin Feng
An Energy-efficient Adaptive Sub-THz Wireless Interconnect with MIMO-Beamforming between Cores and DRAMs. NANOCOM 2016: 26:1-26:6 - [c3]Yuan Liang, Guangyin Feng
An Energy Efficient CMOS Sub-THz Interconnect with Surface Plasmonic Converter and Oscillator. NANOCOM 2016: 27:1-27:6 - 2015
- [c2]Yuan Liang, Hao Yu, Junfeng Zhao, Wei Yang, Yuangang Wang:
An energy efficient and low cross-talk CMOS sub-THz I/O with surface-wave modulator and interconnect. ISLPED 2015: 110-115 - 2014
- [c1]Yang Shang, Hao Yu, Chang Yang, Yuan Liang, Wei Meng Lim:
A 239-281GHz Sub-THz imager with 100MHz resolution by CMOS direct-conversion receiver with on-chip circular-polarized SIW antenna. CICC 2014: 1-4
Coauthor Index
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