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Dong-Kyu Jung
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2020 – today
- 2022
- [j7]Dong-Kyu Jung
, Kiho Seong
A 0.5 V 10 b 3 MS/s 2-Then-1b/Cycle SAR ADC With Digital-Based Time-Domain Reference and Dual-Mode Comparator. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 909-913 (2022) - [j6]Dong-Hyun Yoon
A 3.2-GHz 178-fsrms Jitter Subsampling PLL/DLL-Based Injection-Locked Clock Multiplier. IEEE Trans. Very Large Scale Integr. Syst. 30(7): 915-925 (2022) - 2021
- [c1]Dong-Hyun Yoon, Dong-Kyu Jung, Kiho Seong, Tae-Hyeok Eom, Jae-Soub Han, Ju Eon Kim, Tony Tae-Hyoung Kim, Kwang-Hyun Baek
A 3.2 GHz 178fsrms Jitter Injection Locked Clock Multiplier Using Sub-Sampling FTL and DLL for In-Band Noise Improvement. A-SSCC 2021: 1-3 - 2020
- [j5]Ji-Min Choi, Dong-Hyun Yoon
Design and Analysis of Low Power and High SFDR Direct Digital Frequency Synthesizer. IEEE Access 8: 67581-67590 (2020) - [j4]Ju Eon Kim
A 0.5 V 8-12 Bit 300 KSPS SAR ADC With Adaptive Conversion Time Detection-and-Control for High Immunity to PVT Variations. IEEE Access 8: 101359-101368 (2020) - [j3]Kiho Seong, Dong-Kyu Jung, Dong-Hyun Yoon, Jae-Soub Han, Ju Eon Kim, Tony Tae-Hyoung Kim
Time-Interleaved SAR ADC with Background Timing-Skew Calibration for UWB Wireless Communication in IoT Systems. Sensors 20(8): 2430 (2020)
2010 – 2019
- 2019
- [j2]Dong-Hyun Yoon
LW-DEM: Designing a Low Power Digital-to-Analog Converter Using Lightweight Dynamic Element Matching Technique. IEEE Access 7: 112617-112628 (2019) - 2018
- [j1]Dong-Kyu Jung
A 12-bit Multi-Channel R-R DAC Using a Shared Resistor String Scheme for Area-Efficient Display Source Driver. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3688-3697 (2018)
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