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Georg Rutishauser
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2020 – today
- 2024
- [j6]Julian Moosmann
, Hanna Müller
Flexible and Fully Quantized Lightweight TinyissimoYOLO for Ultra-Low-Power Edge Systems. IEEE Access 12: 75093-75107 (2024) - [j5]Francesco Conti
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2-8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing. IEEE J. Solid State Circuits 59(1): 128-142 (2024) - [c8]Georg Rutishauser, Joan Mihali, Moritz Scherer, Luca Bonini:
xTern: Energy-Efficient Ternary Neural Network Inference on RISC-V-Based Edge Systems. ASAP 2024: 206-213 - [i11]Lorenzo Lamberti, Georg Rutishauser, Francesco Conti, Luca Benini:
Combining Local and Global Perception for Autonomous Navigation on Nano-UAVs. CoRR abs/2403.11661 (2024) - [i10]Georg Rutishauser, Joan Mihali, Moritz Scherer, Luca Benini:
xTern: Energy-Efficient Ternary Neural Network Inference on RISC-V-Based Edge Systems. CoRR abs/2405.19065 (2024) - 2023
- [j4]Georg Rutishauser
7 μJ/inference end-to-end gesture recognition from dynamic vision sensor data using ternarized hybrid convolutional neural networks. Future Gener. Comput. Syst. 149: 717-731 (2023) - [j3]Moritz Scherer
TCN-CUTIE: A 1, 036-TOp/s/W, 2.72-µJ/Inference, 12.2-mW All-Digital Ternary Accelerator in 22-nm FDX Technology. IEEE Micro 43(1): 42-48 (2023) - [c7]Georg Rutishauser, Francesco Conti, Luca Benini:
Free Bits: Latency Optimization of Mixed-Precision Quantized Neural Networks on the Edge. AICAS 2023: 1-5 - [c6]Georg Rutishauser, Robin Hunziker, Alfio Di Mauro, Sizhen Bian
ColibriES: A Milliwatts RISC-V Based Embedded System Leveraging Neuromorphic and Neural Networks Hardware Accelerators for Low-Latency Closed-loop Control Applications. ISCAS 2023: 1-5 - [c5]Francesco Conti, Davide Rossi, Gianna Paulin
A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing. ISSCC 2023: 326-327 - [c4]Alessandro Nadalini, Georg Rutishauser, Alessio Burrello, Nazareno Bruschi, Angelo Garofalo, Luca Benini, Francesco Conti, Davide Rossi:
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks. ISVLSI 2023: 1-6 - [c3]Sizhen Bian
ColibriUAV: An Ultra-Fast, Energy-Efficient Neuromorphic Edge Processing UAV-Platform with Event-Based and Frame-Based Cameras. IWASI 2023: 287-292 - [i9]Georg Rutishauser, Robin Hunziker, Alfio Di Mauro, Sizhen Bian, Luca Benini, Michele Magno:
ColibriES: A Milliwatts RISC-V Based Embedded System Leveraging Neuromorphic and Neural Networks Hardware Accelerators for Low-Latency Closed-loop Control Applications. CoRR abs/2302.07957 (2023) - [i8]Francesco Conti, Gianna Paulin, Davide Rossi, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Luca Benini:
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing. CoRR abs/2305.08415 (2023) - [i7]Sizhen Bian, Lukas Schulthess, Georg Rutishauser, Alfio Di Mauro, Luca Benini, Michele Magno:
ColibriUAV: An Ultra-Fast, Energy-Efficient Neuromorphic Edge Processing UAV-Platform with Event-Based and Frame-Based Cameras. CoRR abs/2305.18371 (2023) - [i6]Alessandro Nadalini, Georg Rutishauser, Alessio Burrello, Nazareno Bruschi, Angelo Garofalo, Luca Benini, Francesco Conti, Davide Rossi:
A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks. CoRR abs/2307.01056 (2023) - [i5]Georg Rutishauser, Francesco Conti, Luca Benini:
Free Bits: Latency Optimization of Mixed-Precision Quantized Neural Networks on the Edge. CoRR abs/2307.02894 (2023) - [i4]Julian Moosmann, Hanna Müller, Nicky Zimmerman, Georg Rutishauser, Luca Benini, Michele Magno:
Flexible and Fully Quantized Ultra-Lightweight TinyissimoYOLO for Ultra-Low-Power Edge Systems. CoRR abs/2307.05999 (2023) - 2022
- [j2]Moritz Scherer
CUTIE: Beyond PetaOp/s/W Ternary DNN Inference Acceleration With Better-Than-Binary Energy Efficiency. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(4): 1020-1033 (2022) - [c2]Moritz Scherer, Alfio Di Mauro, Georg Rutishauser, Tim Fischer, Luca Benini:
A 1036 TOp/s/W, 12.2 mW, 2.72 μJ/Inference All Digital TNN Accelerator in 22 nm FDX Technology for TinyML Applications. COOL CHIPS 2022: 1-3 - [c1]Georg Rutishauser, Moritz Scherer, Tim Fischer, Luca Benini:
Ternarized TCN for $\mu \mathrm{J}/\text{Inference}$ Gesture Recognition from DVS Event Frames. DATE 2022: 736-741 - [i3]Moritz Scherer, Alfio Di Mauro, Tim Fischer, Georg Rutishauser, Luca Benini:
TCN-CUTIE: A 1036 TOp/s/W, 2.72 uJ/Inference, 12.2 mW All-Digital Ternary Accelerator in 22 nm FDX Technology. CoRR abs/2212.00688 (2022) - 2020
- [i2]Moritz Scherer, Georg Rutishauser, Lukas Cavigelli, Luca Benini:
CUTIE: Beyond PetaOp/s/W Ternary DNN Inference Acceleration with Better-than-Binary Energy Efficiency. CoRR abs/2011.01713 (2020)
2010 – 2019
- 2019
- [j1]Lukas Cavigelli
EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators. IEEE J. Emerg. Sel. Topics Circuits Syst. 9(4): 723-734 (2019) - [i1]Lukas Cavigelli, Georg Rutishauser, Luca Benini:
EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators. CoRR abs/1908.11645 (2019)
Coauthor Index
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last updated on 2024-10-02 20:41 CEST by the dblp team
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