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Michael Papamichael
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- affiliation: Carnegie Mellon University, Pittsburgh, USA
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2020 – today
- 2024
- [i2]Tommaso Bonato, Abdul Kabbani, Daniele De Sensi, Rong Pan, Yanfang Le, Costin Raiciu, Mark Handley, Timo Schneider, Nils Blach, Ahmad Ghalayini, Daniel S. F. Alves, Michael Papamichael, Adrian M. Caulfield, Torsten Hoefler:
SMaRTT-REPS: Sender-based Marked Rapidly-adapting Trimmed & Timed Transport with Recycled Entropies. CoRR abs/2404.01630 (2024) - [i1]Tommaso Bonato, Abdul Kabbani, Ahmad Ghalayini, Mohammad Dohadwala, Michael Papamichael, Daniele De Sensi, Torsten Hoefler:
REPS: Recycling Entropies for Packet Spraying to Adaptively Explore Paths and Mitigate Failures. CoRR abs/2407.21625 (2024)
2010 – 2019
- 2019
- [j6]Jeremy Fowers, Kalin Ovtcharov, Michael K. Papamichael, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Logan Adams, Mahdi Ghandi, Stephen Heil, Prerak Patel, Adam Sapek, Gabriel Weisz, Lisa Woods, Sitaram Lanka, Steven K. Reinhardt, Adrian M. Caulfield, Eric S. Chung, Doug Burger:
Inside Project Brainwave's Cloud-Scale, Real-Time AI Processor. IEEE Micro 39(3): 20-28 (2019) - 2018
- [j5]Eric S. Chung, Jeremy Fowers, Kalin Ovtcharov, Michael Papamichael, Adrian M. Caulfield, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Maleen Abeydeera, Logan Adams, Hari Angepat, Christian Boehn, Derek Chiou, Oren Firestein, Alessandro Forin, Kang Su Gatlin, Mahdi Ghandi, Stephen Heil, Kyle Holohan, Ahmad El Husseini, Tamás Juhász, Kara Kagi, Ratna Kovvuri, Sitaram Lanka, Friedel van Megen, Dima Mukhortov, Prerak Patel, Brandon Perez, Amanda Rapsang, Steven K. Reinhardt, Bita Rouhani, Adam Sapek, Raja Seera, Sangeetha Shekar, Balaji Sridharan, Gabriel Weisz, Lisa Woods, Phillip Yi Xiao, Dan Zhang, Ritchie Zhao, Doug Burger:
Serving DNNs in Real Time at Datacenter Scale with Project Brainwave. IEEE Micro 38(2): 8-20 (2018) - [c15]Jeremy Fowers, Kalin Ovtcharov, Michael Papamichael, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Logan Adams, Mahdi Ghandi, Stephen Heil, Prerak Patel, Adam Sapek, Gabriel Weisz, Lisa Woods, Sitaram Lanka, Steven K. Reinhardt, Adrian M. Caulfield, Eric S. Chung, Doug Burger:
A Configurable Cloud-Scale DNN Processor for Real-Time AI. ISCA 2018: 1-14 - 2017
- [j4]Adrian M. Caulfield, Eric S. Chung, Andrew Putnam
, Hari Angepat, Daniel Firestone, Jeremy Fowers, Michael Haselman, Stephen Heil, Matt Humphrey, Puneet Kaur, Joo-Young Kim, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Lisa Woods, Sitaram Lanka, Derek Chiou, Doug Burger:
Configurable Clouds. IEEE Micro 37(3): 52-61 (2017) - [c14]Jiayi Sheng, Chen Yang, Ahmed Sanaullah, Michael Papamichael, Adrian M. Caulfield, Martin C. Herbordt:
HPC on FPGA clouds: 3D FFTs and implications for molecular dynamics. FPL 2017: 1-4 - 2016
- [c13]Shlomi Alkalay, Hari Angepat, Adrian M. Caulfield, Eric S. Chung, Oren Firestein, Michael Haselman, Stephen Heil, Kyle Holohan, Matt Humphrey, Tamás Juhász, Puneet Kaur, Sitaram Lanka, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Andrew Putnam, Raja Seera, Rimon Tadros, Jason Thong, Lisa Woods, Derek Chiou, Doug Burger:
Agile Co-Design for a Reconfigurable Datacenter. FPGA 2016: 15 - [c12]Adrian M. Caulfield, Eric S. Chung, Andrew Putnam
A cloud-scale acceleration architecture. MICRO 2016: 7:1-7:13 - 2015
- [j3]Michael K. Papamichael, James C. Hoe:
The CONNECT Network-on-Chip Generator. Computer 48(12): 72-79 (2015) - [c11]Michael K. Papamichael, Peter A. Milder
Nautilus: fast automated IP design space search using guided genetic algorithms. DAC 2015: 43:1-43:6 - [c10]Michael Papamichael, Cagla Cakir, Chen Sun, Chia-Hsin Owen Chen, James C. Hoe, Ken Mai, Li-Shiuan Peh, Vladimir Stojanovic:
DELPHI: a framework for RTL-based architecture design evaluation using DSENT models. ISPASS 2015: 11-20 - 2013
- [c9]Eric S. Chung, Michael Papamichael:
ShrinkWrap: Compiler-Enabled Optimization and Customization of Soft Memory Interconnects. FCCM 2013: 113-116 - [c8]Eric S. Chung, Michael Papamichael, Gabriel Weisz, James C. Hoe:
Cross-platform FPGA accelerator development using CoRAM and CONNECT. FPGA 2013: 3-4 - [c7]Eric S. Chung, Michael Papamichael:
Towards automatic customization of interconnect and memory in the CoRAM abstraction (abstract only). FPGA 2013: 265 - 2012
- [c6]Michael Papamichael, James C. Hoe:
CONNECT: re-examining conventional wisdom for designing nocs in the context of FPGAs. FPGA 2012: 37-46 - [c5]Eric S. Chung, Michael Papamichael, Gabriel Weisz, James C. Hoe, Ken Mai
Prototype and evaluation of the CoRAM memory architecture for FPGA-based computing. FPGA 2012: 139-142 - 2011
- [j2]Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor Harchol-Balter
Thread Cluster Memory Scheduling. IEEE Micro 31(1): 78-89 (2011) - [c4]Michael Papamichael:
Fast scalable FPGA-based Network-on-Chip simulation models. MEMOCODE 2011: 77-82 - [c3]Michael Papamichael, James C. Hoe, Onur Mutlu:
FIST: A fast, lightweight, FPGA-friendly packet latency estimator for NoC modeling in full-system simulations. NOCS 2011: 137-144 - 2010
- [c2]Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor Harchol-Balter
Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior. MICRO 2010: 65-76
2000 – 2009
- 2009
- [j1]Eric S. Chung, Michael Papamichael, Eriko Nurvitadhi, James C. Hoe, Ken Mai
ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs. ACM Trans. Reconfigurable Technol. Syst. 2(2): 15:1-15:32 (2009) - 2007
- [c1]Vassilis Papaefstathiou, Dionisios N. Pnevmatikatos
Prototyping Efficient Interprocessor Communication Mechanisms. ICSAMOS 2007: 26-33
Coauthor Index
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