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Sifan Sun
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2020 – today
- 2025
- [j4]Zhongzhen Tong
, Sifan Sun
In-MRAM Computing Based on Complementary-Sensing Time-Based Readout Circuit Using Hybrid VGSOT-MTJ/GAA-CNTFET. IEEE Trans. Circuits Syst. II Express Briefs 72(1): 173-177 (2025) - [c6]Yitong Zhou
A 24.65 TOPS/W@INT8 Hybrid Analog-Digital Multi-core SRAM CIM Macro with Optimal Weight Dividing and Resource Allocation Strategies. ASP-DAC 2025: 663-668 - 2024
- [j3]Jinyu Bai
CIMQ: A Hardware-Efficient Quantization Framework for Computing-In-Memory-Based Neural Network Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(1): 189-202 (2024) - [j2]Sifan Sun
CIM²PQ: An Arraywise and Hardware-Friendly Mixed Precision Quantization Method for Analog Computing-In-Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(7): 2084-2097 (2024) - 2023
- [j1]Jinyu Bai, Wenlu Xue, Yunqian Fan, Sifan Sun, Wang Kang
Partial Sum Quantization for Computing-In-Memory-Based Neural Network Accelerator. IEEE Trans. Circuits Syst. II Express Briefs 70(8): 3049-3053 (2023) - [c5]Wenlu Xue, Jinyu Bai, Sifan Sun, Wang Kang:
Hierarchical Non-Structured Pruning for Computing-In-Memory Accelerators with Reduced ADC Resolution Requirement. DATE 2023: 1-6 - [c4]Jinyu Bai, Sifan Sun, Wang Kang:
Exploring Bit-Level Sparsity for Partial Sum Quantization in Computing-In-Memory Accelerator. NVMSA 2023: 32-37 - [c3]Sifan Sun, Jinming Ge, Jinyu Bai, Wang Kang:
ES-MPQ: Evolutionary Search Enabled Mixed Precision Quantization Framework for Computing-in-Memory. NVMSA 2023: 38-43 - [c2]Linjun Jiang, Sifan Sun, Jinming Ge, He Zhang, Wang Kang:
An In-Memory-Computing STT-MRAM Macro with Analog ReLU and Pooling Layers for Ultra-High Efficient Neural Network. NVMSA 2023: 44-49 - 2021
- [c1]Jinyu Bai, Yunqian Fan, Sifan Sun, Wang Kang, Weisheng Zhao:
Tiny neural network search and implementation for embedded FPGA: a software-hardware co-design approach. A-SSCC 2021: 1-3
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