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Pallab Dasgupta
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2020 – today
- 2024
- [j95]Barnali Basak, Pallab Dasgupta, Arpan Pal:
Efficient Low-Memory Implementation of Sparse CNNs Using Encoded Partitioned Hybrid Sparse Format. ACM Trans. Embed. Comput. Syst. 23(6): 103:1-103:30 (2024) - [c119]Sumanta Dey, Pallab Dasgupta, Soumyajit Dey:
P2BPO: Permeable Penalty Barrier-Based Policy Optimization for Safe RL. AAAI 2024: 21029-21036 - [c118]Somnath Hazra, Pallab Dasgupta, Soumyajit Dey:
Addressing Permutation Challenges in Multi-Agent Reinforcement Learning. AAMAS 2024: 2303-2305 - [c117]Sumanta Dey, Briti Gangopadhyay, Pallab Dasgupta, Soumyajit Dey:
MAGNets: Micro-Architectured Group Neural Networks. AAMAS 2024: 2650-2658 - [c116]Sourav Das, Aritra Hazra, Pallab Dasgupta, Sudipta Kundu, Himanshu Jain:
PURSE: Property Ordering Using Runtime Statistics for Efficient Multi - Property Verification. DATE 2024: 1-6 - [c115]Sumanta Dey
, Praveen Verma
An Adaptive Interpretable Safe-RL Approach for Addressing Smart Grid Supply-Side Uncertainties. EXTRAAMAS 2024: 116-136 - [c114]Kaushik Dey, Satheesh K. Perepu, Abir Das, Pallab Dasgupta:
Towards Adaptive Networks - Generalized utility functions in Multi-Agent Frameworks. NetSoft 2024: 336-340 - [i20]Kaushik Dey, Satheesh K. Perepu, Abir Das, Pallab Dasgupta:
Towards Adaptive IMFs - Generalization of utility functions in Multi-Agent Frameworks. CoRR abs/2405.07621 (2024) - 2023
- [j94]Somnath Hazra
Penalizing proposals using classifiers for semi-supervised object detection. Comput. Vis. Image Underst. 235: 103772 (2023) - [j93]Sayandeep Saha, Manaar Alam, Arnab Bag, Debdeep Mukhopadhyay, Pallab Dasgupta:
Learn from Your Faults: Leakage Assessment in Fault Attacks Using Deep Learning. J. Cryptol. 36(3): 19 (2023) - [j92]Briti Gangopadhyay
Safe and Stable RL (S2RL) Driving Policies Using Control Barrier and Control Lyapunov Functions. IEEE Trans. Intell. Veh. 8(2): 1889-1899 (2023) - [j91]Sourav Das
CoVerPlan: A Comprehensive Verification Planning Framework Leveraging PSS Specifications. ACM Trans. Design Autom. Electr. Syst. 28(1): 9:1-9:32 (2023) - [c113]Sumanta Dey, Pallab Dasgupta, Soumyajit Dey:
Safe Reinforcement Learning through Phasic Safety-Oriented Policy Optimization. SafeAI@AAAI 2023 - [c112]Briti Gangopadhyay, Pallab Dasgupta, Soumyajit Dey:
Safety Aware Neural Pruning for Deep Reinforcement Learning (Student Abstract). AAAI 2023: 16212-16213 - [c111]Briti Gangopadhyay, Pallab Dasgupta, Soumyajit Dey:
Counterexample-Guided Policy Refinement in Multi-Agent Reinforcement Learning. AAMAS 2023: 1606-1614 - [c110]Sayandeep Sanyal, Aritra Hazra, Pallab Dasgupta, Scott Morrison, Sudhakar Surendran, Lakshmanan Balasubramanian, Mohammad Moshiur Rahman:
Analog Coverage-driven Selection of Simulation Corners for AMS Integrated Circuits. DATE 2023: 1-6 - [c109]Sumanta Dey, Sharat Bhat, Pallab Dasgupta, Soumyajit Dey:
Imperative Action Masking for Safe Exploration in Reinforcement Learning. EXTRAAMAS 2023: 130-142 - [c108]Swarnava Dey
DietCNN: Multiplication-free Inference for Quantized CNNs. IJCNN 2023: 1-8 - [c107]Kaushik Dey, Satheesh K. Perepu, Pallab Dasgupta, Abir Das:
Domain Adaptation of Reinforcement Learning Agents based on Network Service Proximity. NetSoft 2023: 152-160 - [c106]Shalini Mukhopadhyay, Swarnava Dey
Generating Tiny Deep Neural Networks for ECG Classification on Micro-Controllers. PerCom Workshops 2023: 392-397 - [c105]Sayandeep Sanyal, Mayukh Bhattacharya, Pallab Dasgupta, Amit Patra:
Accelerating Defect Simulation in Analog and Mixed-Signal Circuits by Parallel Defect Injection. VLSID 2023: 325-330 - [i19]Kaushik Dey, Satheesh K. Perepu, Pallab Dasgupta, Abir Das:
Domain Adaptation of Reinforcement Learning Agents based on Network Service Proximity. CoRR abs/2303.01013 (2023) - [i18]Swarnava Dey, Pallab Dasgupta, Partha Pratim Chakrabarti:
DietCNN: Multiplication-free Inference for Quantized CNNs. CoRR abs/2305.05274 (2023) - 2022
- [j90]Sudipa Mandal
Migrating Assertions From Dense to Discrete Time. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2362-2371 (2022) - [j89]Sayandeep Sanyal
The CoveRT Approach for Coverage Management in Analog and Mixed-Signal Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5695-5708 (2022) - [j88]Briti Gangopadhyay
Hierarchical Program-Triggered Reinforcement Learning Agents for Automated Driving. IEEE Trans. Intell. Transp. Syst. 23(8): 10902-10911 (2022) - [j87]Sumanta Dey
Adaptive Safety Shields for Reinforcement Learning-Based Cell Shaping. IEEE Trans. Netw. Serv. Manag. 19(4): 5034-5043 (2022) - [c104]Swarnava Dey
SymDNN: Simple & Effective Adversarial Robustness for Embedded Systems. CVPR Workshops 2022: 3598-3608 - [c103]Praveen Verma
Critical Load Identification for Load Redistribution Attacks. ISGT Asia 2022: 76-80 - [c102]Briti Gangopadhyay
PruVer: Verification Assisted Pruning for Deep Reinforcement Learning. PRICAI (1) 2022: 137-149 - [c101]Ayan Chakraborty
Tracking Coverage Artefacts for Periodic Signals using Sequence-based Abstractions. VLSID 2022: 132-137 - [i17]Somnath Hazra
Penalizing Proposals using Classifiers for Semi-Supervised Object Detection. CoRR abs/2205.13219 (2022) - 2021
- [j86]Pradeep Rengaswamy
hf0: A Hybrid Pitch Extraction Method for Multimodal Voice. Circuits Syst. Signal Process. 40(1): 262-275 (2021) - [j85]Pradeep Rengaswamy
SongF0: A Spectrum-Based Fundamental Frequency Estimation for Monophonic Songs. Circuits Syst. Signal Process. 40(2): 772-797 (2021) - [j84]Sudipa Mandal
Usage-Driven Personalization of Power Management Logic. IEEE Embed. Syst. Lett. 13(3): 106-109 (2021) - [j83]Sunandan Adhikary
SMT-Based Verification of Safety-Critical Embedded Control Software. IEEE Embed. Syst. Lett. 13(3): 138-141 (2021) - [j82]Antonio Anastasio Bruto da Costa, Pallab Dasgupta:
Learning Temporal Causal Sequence Relationships from Real-Time Time-Series. J. Artif. Intell. Res. 70: 205-243 (2021) - [j81]Briti Gangopadhyay
Semi-lexical languages: a formal basis for using domain knowledge to resolve ambiguities in deep-learning based computer vision. Pattern Recognit. Lett. 152: 143-149 (2021) - [j80]Sayandeep Sanyal
Recurrence in Dense-Time AMS Assertions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(11): 2416-2420 (2021) - [j79]Sumana Ghosh, Soumyajit Dey, Pallab Dasgupta:
Performance-Driven Post-Processing of Control Loop Execution Schedules. ACM Trans. Design Autom. Electr. Syst. 26(2): 13:1-13:27 (2021) - [c100]Praveen Verma
ML-assisted Real Time Congestion Mitigation under Supply-side Uncertainties. ISGT Asia 2021: 1-5 - [c99]Briti Gangopadhyay, Pallab Dasgupta:
Counterexample Guided RL Policy Refinement Using Bayesian Optimization. NeurIPS 2021: 22783-22794 - [c98]Sudipa Mandal, Krushna Gaurkar, Pallab Dasgupta, Aritra Hazra:
An RL based Approach for Thermal-Aware Energy Optimized Task Scheduling in Multi-core Processors. VLSID 2021: 181-186 - [i16]Antonio Anastasio Bruto da Costa, Pallab Dasgupta, Nikolaos Kekatos:
Quantitative Corner Case Feature Analysis of Hybrid Automata with ForFETSMT. CoRR abs/2101.01255 (2021) - [i15]Briti Gangopadhyay, Harshit Soora, Pallab Dasgupta:
Hierarchical Program-Triggered Reinforcement Learning Agents For Automated Driving. CoRR abs/2103.13861 (2021) - [i14]Sayandeep Sanyal, Ayan Chakraborty, Pallab Dasgupta, Aritra Hazra:
Methodology for Biasing Random Simulation for Rapid Coverage of Corner Cases in AMS Designs. CoRR abs/2104.14785 (2021) - 2020
- [j78]Sayandeep Sanyal
A Methodology for Identification of Internal Nets for Improving Fault Coverage in Analog and Mixed Signal Circuits. J. Electron. Test. 36(6): 719-730 (2020) - [j77]Rajib Lochan Jana, Soumyajit Dey, Arijit Mondal, Pallab Dasgupta:
Automated planning for finding alternative bug traces. IET Comput. Digit. Tech. 14(6): 322-335 (2020) - [j76]Pradeep Rengaswamy, Mittapalle Kiran Reddy
Robust f0 extraction from monophonic signals using adaptive sub-band filtering. Speech Commun. 116: 77-85 (2020) - [j75]Sumana Ghosh
Pattern Guided Integrated Scheduling and Routing in Multi-Hop Control Networks. ACM Trans. Embed. Comput. Syst. 19(2): 9:1-9:28 (2020) - [j74]Rajib Lochan Jana, Soumyajit Dey, Pallab Dasgupta:
A Hierarchical HVAC Control Scheme for Energy-aware Smart Building Automation. ACM Trans. Design Autom. Electr. Syst. 25(4): 31:1-3:33 (2020) - [j73]Sudipa Mandal
Assertions for Protecting Mixed-Signal Latency Contracts in Power Management. IEEE Trans. Very Large Scale Integr. Syst. 28(8): 1745-1756 (2020) - [c97]Sayandeep Sanyal, Aritra Hazra, Pallab Dasgupta, Scott Morrison, Sudhakar Surendran, Lakshmanan Balasubramanian:
The Notion of Cross Coverage in AMS Design Verification. ASP-DAC 2020: 217-222 - [c96]Sumanta Dey, Pallab Dasgupta, Briti Gangopadhyay:
Safety Augmentation in Decision Trees. AISafety@IJCAI 2020 - [c95]Sayandeep Sanyal, Aritra Hazra, Pallab Dasgupta, Scott Morrison, Sudhakar Surendran, Lakshmanan Balasubramanian:
CoveRT: A Coverage Reporting Tool for Analog Mixed-Signal Designs. VLSID 2020: 119-124 - [i13]Briti Gangopadhyay, Somnath Hazra
Semi-Lexical Languages - A Formal Basis for Unifying Machine Learning and Symbolic Reasoning in Computer Vision. CoRR abs/2004.12152 (2020) - [i12]Ginju V. George, Aritra Hazra, Pallab Dasgupta, Partha Pratim Chakrabarti:
Early-Stage Resource Estimation from Functional Reliability Specification in Embedded Cyber-Physical Systems. CoRR abs/2005.00995 (2020) - [i11]Sayandeep Sanyal, Antonio Anastasio Bruto da Costa, Pallab Dasgupta:
Recurrence in Dense-time AMS Assertions. CoRR abs/2011.08805 (2020) - [i10]Sayandeep Saha, Manaar Alam, Arnab Bag, Debdeep Mukhopadhyay, Pallab Dasgupta:
Leakage Assessment in Fault Attacks: A Deep Learning Perspective. IACR Cryptol. ePrint Arch. 2020: 306 (2020)
2010 – 2019
- 2019
- [j72]Sumana Ghosh
Performance and energy aware robust specification of control execution patterns under dropped samples. IET Comput. Digit. Tech. 13(6): 493-504 (2019) - [j71]Sayandeep Saha
An automated framework for exploitable fault identification in block ciphers. J. Cryptogr. Eng. 9(3): 203-219 (2019) - [j70]Antara Ain
Interpreting Local Variables in AMS Assertions During Simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(5): 980-984 (2019) - [j69]Sayandeep Saha
Automatic Characterization of Exploitable Faults: A Machine Learning Approach. IEEE Trans. Inf. Forensics Secur. 14(4): 954-968 (2019) - [c94]Sayandeep Sanyal, Amit Patra, Pallab Dasgupta, Mayukh Bhattacharya:
A Structured Approach for Rapid Identification of Fault-Sensitive Nets in Analog Circuits. ATS 2019: 135-140 - [c93]Sayandeep Saha, S. Nishok Kumar, Sikhar Patranabis, Debdeep Mukhopadhyay, Pallab Dasgupta:
ALAFA: Automatic Leakage Assessment for Fault Attack Countermeasures. DAC 2019: 136 - [c92]Sayandeep Sanyal, Shan Pavan Pani Krishna Garapati, Amit Patra, Pallab Dasgupta, Mayukh Bhattacharya:
Fault Classification and Coverage of Analog Circuits using DC Operating Point and Frequency Response Analysis. ACM Great Lakes Symposium on VLSI 2019: 123-128 - [c91]Briti Gangopadhyay
Identification of Test Cases for Automated Driving Systems Using Bayesian Optimization. ITSC 2019: 1961-1967 - [c90]Sumana Ghosh
Synthesizing Performance-Aware (m, k)-Firm Control Execution Patterns Under Dropped Samples. VLSID 2019: 1-6 - [i9]Antonio Anastasio Bruto da Costa, Goran Frehse, Pallab Dasgupta:
Flexible Mining of Prefix Sequences from Time-Series Traces. CoRR abs/1905.12262 (2019) - 2018
- [j68]Sumana Ghosh
Co-Synthesis of Loop Execution Patterns for Multihop Control Networks. IEEE Embed. Syst. Lett. 10(4): 111-114 (2018) - [j67]Antonio Anastasio Bruto da Costa
Formal Feature Interpretation of Hybrid Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(11): 2474-2484 (2018) - [j66]Sayandeep Saha, Debdeep Mukhopadhyay, Pallab Dasgupta:
ExpFault: An Automated Framework for Exploitable Fault Characterization in Block Ciphers. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2018(2): 242-276 (2018) - [c89]Sayandeep Saha, Dirmanto Jap, Jakub Breier
Breaking Redundancy-Based Countermeasures with Random Faults and Power Side Channel. FDTC 2018: 15-22 - [c88]Antara Ain, Akshay Mambakam, Pallab Dasgupta:
Feature Based Coverage Analysis of AMS Circuits. ISVLSI 2018: 423-428 - [c87]Sudipa Mandal, Aritra Hazra, Pallab Dasgupta, Chunduri Rama Mohan:
Formal Methods for Coverage Analysis of Power Management Logic with Mixed-Signal Components. VLSID 2018: 37-42 - [c86]Antonio Anastasio Bruto da Costa, Shriya Dharade, Sudipa Mandal, Pallab Dasgupta:
AMS-Miner: Mining AMS Assertions Using Interval Arithmetic. VLSID 2018: 404-409 - [p2]Sudipa Mandal, Shilpi Chaudhuri, Antonio Anastasio Bruto da Costa, Gouri Karambelkar, Pallab Dasgupta:
On the Deep Structure of Ragas and Analytic Rating of Music Scores. Heritage Preservation 2018: 161-179 - [i8]Sayandeep Saha, Debdeep Mukhopadhyay, Pallab Dasgupta:
ExpFault: An Automated Framework for Exploitable Fault Characterization in Block Ciphers. IACR Cryptol. ePrint Arch. 2018: 295 (2018) - 2017
- [j65]Sumana Ghosh
A Structured Methodology for Pattern based Adaptive Scheduling in Embedded Control. ACM Trans. Embed. Comput. Syst. 16(5s): 189:1-189:22 (2017) - [j64]Shiladitya Ghosh, Arindam Das, Nirvik Basak, Pallab Dasgupta, Alok Katiyar:
Formal Methods for Validation and Test Point Prioritization in Railway Signaling Logic. IEEE Trans. Intell. Transp. Syst. 18(3): 678-689 (2017) - [c85]Antonio Anastasio Bruto da Costa, Pallab Dasgupta:
ForFET: A Formal Feature Evaluation Tool for Hybrid Systems. ATVA 2017: 437-445 - [c84]Sayandeep Saha, Ujjawal Kumar, Debdeep Mukhopadhyay, Pallab Dasgupta:
An Automated Framework for Exploitable Fault Identification in Block Ciphers - A Data Mining Approach. PROOFS 2017: 50-67 - [c83]Antara Ain, Sayandeep Sanyal, Pallab Dasgupta:
A Framework for Automated Feature Based Mixed-Signal Equivalence Checking. VDAT 2017: 779-791 - [c82]Antonio Anastasio Bruto da Costa, Pallab Dasgupta:
Generating AMS Behavioral Models with Formal Guarantees on Feature Accuracy. VLSID 2017: 233-238 - [c81]Sudipa Mandal, Antonio Anastasio Bruto da Costa, Aritra Hazra, Pallab Dasgupta, Bhushan Naware, Chunduri Rama Mohan, Sanjib Basu:
Formal Verification of Power Management Logic with Mixed-Signal Domains. VLSID 2017: 239-244 - [c80]Antara Ain, Akshay Mambakam, Pallab Dasgupta, Siddhartha Mukhopadhyay:
Feature Based Identification of Transmission Line Faults by Synchronous Monitoring of PMUs. VLSID 2017: 245-250 - [i7]Antonio Anastasio Bruto da Costa, Pallab Dasgupta:
Formal Analysis of Hybrid Systems Using Feature Indented Assertions. CoRR abs/1711.00669 (2017) - [i6]Sayandeep Saha, Ujjawal Kumar, Debdeep Mukhopadhyay, Pallab Dasgupta:
Differential Fault Analysis Automation. IACR Cryptol. ePrint Arch. 2017: 673 (2017) - [i5]Sayandeep Saha, Dirmanto Jap, Sikhar Patranabis, Debdeep Mukhopadhyay, Shivam Bhasin, Pallab Dasgupta:
Automatic Characterization of Exploitable Faults: A Machine Learning Approach. IACR Cryptol. ePrint Arch. 2017: 1008 (2017) - 2016
- [j63]Rajorshee Raha
Multirate Sampling for Power-Performance Tradeoff in Embedded Control. IEEE Embed. Syst. Lett. 8(4): 77-80 (2016) - [j62]Aritra Hazra, Pallab Dasgupta, Partha Pratim Chakrabarti:
Formal assessment of reliability specifications in embedded cyber-physical systems. J. Appl. Log. 18: 71-104 (2016) - [j61]Antara Ain, Antonio Anastasio Bruto da Costa, Pallab Dasgupta:
Feature Indented Assertions for Analog and Mixed-Signal Validation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(11): 1928-1941 (2016) - [c79]Majid Zamani
Scheduling of Controllers' Update-Rates for Residual Bandwidth Utilization. FORMATS 2016: 85-101 - [c78]Pradeep Rengaswamy, Gurunath Reddy M., K. Sreenivasa Rao, Pallab Dasgupta:
A Robust Non-Parametric and Filtering Based Approach for Glottal Closure Instant Detection. INTERSPEECH 2016: 1795-1799 - [c77]Antonio Anastasio Bruto da Costa, Pallab Dasgupta, Goran Frehse
Formal feature analysis of hybrid automata. MEMOCODE 2016: 2-11 - [c76]Rajib Lochan Jana, Shashank Kuchibhotla, Soumyajit Dey, Pallab Dasgupta, Rakesh Kumar:
Planning based guided reconstruction of corner cases in architectural validation. VDAT 2016: 1-6 - 2015
- [j60]Antonio Anastasio Bruto da Costa, Pallab Dasgupta:
Formal Interpretation of Assertion-Based Features on AMS Designs. IEEE Des. Test 32(1): 9-17 (2015) - [j59]Kamalesh Ghosh, Pallab Dasgupta, S. Ramesh:
Automated Planning as an Early Verification Tool for Distributed Control. J. Autom. Reason. 54(1): 31-68 (2015) - [c75]Martin Becker, Sajid Mohamed
Timing Analysis of Safety-Critical Automotive Software: The AUTOSAFE Tool Flow. APSEC 2015: 385-392 - [c74]Saikat Dutta, Soumi Chattopadhyay
A New Approach for Minimal Environment Construction for Modular Property Verification. ATS 2015: 205-210 - [c73]R. Pradeep, Prasenjit Dhara, K. Sreenivasa Rao, Pallab Dasgupta:
Raga identification based on Normalized Note Histogram features. ICACCI 2015: 1491-1496 - [c72]Sumana Ghosh
Formal Methods for Pattern Based Reliability Analysis in Embedded Systems. VLSID 2015: 192-197 - [c71]Antara Ain, Pallab Dasgupta:
Monitoring AMS Simulation: From Assertions to Features. VLSID 2015: 429-434 - [i4]Rajorshee Raha, Soumyajit Dey, Partha Pratim Chakrabarti, Pallab Dasgupta:
Multi-mode Sampling Period Selection for Embedded Real Time Control. CoRR abs/1506.08538 (2015) - 2014
- [j58]Manoj G. Dixit, S. Ramesh, Pallab Dasgupta:
Time-budgeting: a component based development methodology for real-time embedded systems. Formal Aspects Comput. 26(3): 591-621 (2014) - [j57]Pallab Dasgupta, Mandayam K. Srivas, Rajdeep Mukherjee:
Formal Hardware/Software Co-Verification of Embedded Power Controllers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(12): 2025-2029 (2014) - [c70]Kajori Banerjee, Pallab Dasgupta:
Acceptance and random generation of event sequences under real time calculus constraints. DATE 2014: 1-6 - [c69]Rajorshee Raha, Aritra Hazra, Akash Mondal, Soumyajit Dey, Partha Pratim Chakrabarti, Pallab Dasgupta:
Synthesis of sampling modes for adaptive control. ICCSCE 2014: 294-299 - [p1]Manoj G. Dixit, S. Ramesh, Pallab Dasgupta:
Early Time-Budgeting for Component-Based Embedded Control Systems. Embedded Systems Development, From Functional Models to Implementations 2014: 123-137 - [i3]Priyankar Ghosh, Amit Sharma, P. P. Chakrabarti, Pallab Dasgupta:
Algorithms for Generating Ordered Solutions for Explicit AND/OR Structures. CoRR abs/1401.5852 (2014) - 2013
- [j56]Aritra Hazra, Priyankar Ghosh, Satya Gautam Vadlamudi, P. P. Chakrabarti, Pallab Dasgupta:
Formal Methods for Early Analysis of Functional Reliability in Component-Based Embedded Applications. IEEE Embed. Syst. Lett. 5(1): 8-11 (2013) - [j55]M. Santhosh Prabhu, Aritra Hazra, Pallab Dasgupta:
Reliability Guarantees in Automata-Based Scheduling for Embedded Control Software. IEEE Embed. Syst. Lett. 5(2): 17-20 (2013) - [j54]Subhankar Mukherjee, Pallab Dasgupta:
A fuzzy real-time temporal logic. Int. J. Approx. Reason. 54(9): 1452-1470 (2013) - [j53]Antara Ain, Subhankar Mukherjee, Pallab Dasgupta, Siddhartha Mukhopadhyay:
Post-silicon debugging of PMU integration errors using behavioral models. Integr. 46(3): 310-321 (2013) - [j52]Rajdeep Mukherjee, Priyankar Ghosh, Pallab Dasgupta, Ajit Pal:
An Integrated Approach for Fine-Grained Power and Peak Temperature Management During High-Level Synthesis. J. Low Power Electron. 9(3): 350-362 (2013) - [j51]Srobona Mitra, Ansuman Banerjee, Pallab Dasgupta, Priyankar Ghosh, Harish Kumar:
Formal Guarantees for Localized Bug Fixes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(8): 1274-1287 (2013) - [j50]Aritra Hazra, Rajdeep Mukherjee, Pallab Dasgupta, Ajit Pal, Kevin Harer, Ansuman Banerjee, Subhankar Mukherjee:
POWER-TRUCTOR: An Integrated Tool Flow for Formal Verification and Coverage of Architectural Power Intent. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(11): 1801-1813 (2013) - [j49]Srobona Mitra, Ansuman Banerjee, Pallab Dasgupta, Harish Kumar:
Counterexample Ranking Using Mined Invariants. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(12): 1978-1991 (2013) - [j48]Aritra Hazra, Sahil Goyal, Pallab Dasgupta, Ajit Pal:
Formal Verification of Architectural Power Intent. IEEE Trans. Very Large Scale Integr. Syst. 21(1): 78-91 (2013) - [c68]M. Santhosh Prabhu, Aritra Hazra, Pallab Dasgupta, Partha Pratim Chakrabarti:
Handling fault detection latencies in automata-based scheduling for embedded control software. CACSD 2013: 1-6 - [c67]Priyankar Ghosh, Amit Sharma, Partha Pratim Chakrabarti, Pallab Dasgupta:
Algorithms for Generating Ordered Solutions for Explicit AND/OR Structures : Extended Abstract. IJCAI 2013: 3156-3160 - [c66]Rajdeep Mukherjee, Subhankar Mukherjee, Pallab Dasgupta:
Model checking of global power management strategies in software with temporal logic properties. ISEC 2013: 29-34 - [c65]Kajori Banerjee, M. Santhosh Prabhu, Pallab Dasgupta:
Debugging assertion failures in software controllers using a reference model. ISEC 2013: 79-82 - [c64]Priyankar Ghosh, Partha Pratim Chakrabarti, Pallab Dasgupta:
Ordered Solution Generation for Implicit AND/OR Search Spaces. PReMI 2013: 581-586 - [c63]Rajdeep Mukherjee, Pallab Dasgupta, Ajit Pal, Subhankar Mukherjee:
Formal Verification of Hardware / Software Power Management Strategies. VLSI Design 2013: 326-331 - [c62]M. Santhosh Prabhu, Pallab Dasgupta:
Model Checking Controllers with Predicate Inputs. VLSI Design 2013: 332-337 - [i2]Rajdeep Mukherjee, Priyankar Ghosh, Pallab Dasgupta, Ajit Pal:
A Multi-objective Perspective for Operator Scheduling using Fine-grained DVS Architecture. CoRR abs/1303.1645 (2013) - 2012
- [j47]Aritra Hazra, Priyankar Ghosh, Pallab Dasgupta, Partha Pratim Chakrabarti:
Cohesive Coverage Management: Simulation Meets Formal Methods. J. Electron. Test. 28(4): 449-468 (2012) - [j46]Srobona Mitra, Priyankar Ghosh, Pallab Dasgupta:
Verification by parts: reusing component invariant checking results. IET Comput. Digit. Tech. 6(1): 19-32 (2012) - [j45]Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta:
SAT based timing analysis for fixed and rise/fall gate delay models. Integr. 45(4): 357-364 (2012) - [j44]Priyankar Ghosh, Amit Sharma, P. P. Chakrabarti, Pallab Dasgupta:
Algorithms for Generating Ordered Solutions for Explicit AND/OR Structures. J. Artif. Intell. Res. 44: 275-333 (2012) - [j43]Priyankar Ghosh, Aritra Hazra, Rahul Gonnabhaktula, Niraj Bhilegaonkar, Pallab Dasgupta, Chittaranjan A. Mandal, Krishna Paul:
POWER-SIM: An SOC Simulator for Estimating Power Profiles of Mobile Workloads. J. Low Power Electron. 8(3): 293-303 (2012) - [j42]Ansuman Banerjee, Sayak Ray, Pallab Dasgupta, P. P. Chakrabarti, S. Ramesh, P. Vignesh V. Ganesan:
A dynamic assertion-based verification platform for validation of UML designs. ACM SIGSOFT Softw. Eng. Notes 37(1): 1-14 (2012) - [j41]Sourasis Das, Ansuman Banerjee, Pallab Dasgupta:
Early Analysis of Critical Faults: An Approach to Test Generation From Formal Specifications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(3): 447-451 (2012) - [j40]Subhankar Mukherjee, Pallab Dasgupta:
Assertion Aware Sampling Refinement: A Mixed-Signal Perspective. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(11): 1772-1776 (2012) - [j39]Subhankar Mukherjee, Pallab Dasgupta:
Computing Minimal Debugging Windows in Failure Traces of AMS Assertions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(11): 1776-1781 (2012) - [j38]Subhankar Mukherjee, Pallab Dasgupta, Siddhartha Mukhopadhyay, Scott Little, John Havlicek, Srikanth Chandrasekaran:
Synchronizing AMS Assertions with AMS Simulation: From Theory to Practice. ACM Trans. Design Autom. Electr. Syst. 17(4): 38:1-38:25 (2012) - [j37]Arijit Mondal, P. P. Chakrabarti, Pallab Dasgupta:
Symbolic-Event-Propagation-Based Minimal Test Set Generation for Robust Path Delay Faults. ACM Trans. Design Autom. Electr. Syst. 17(4): 47:1-47:20 (2012) - [c61]Rajdeep Mukherjee, Priyankar Ghosh, Pallab Dasgupta, Ajit Pal:
Operator Scheduling Revisited: A Multi-objective Perspective for Fine-Grained DVS Architecture. ACITY (3) 2012: 633-648 - [c60]Aritra Hazra, Pallab Dasgupta, Ansuman Banerjee, Kevin Harer:
Formal methods for coverage analysis of architectural power states in power-managed designs. ASP-DAC 2012: 585-590 - [c59]Sourasis Das, Ansuman Banerjee, Pallab Dasgupta:
A Generalized Theory for Formal Assertion Coverage. Asian Test Symposium 2012: 137-142 - [c58]Priyankar Ghosh, Partha Pratim Chakrabarti, Pallab Dasgupta:
Anytime Algorithms for Biobjective Heuristic Search. Australasian Conference on Artificial Intelligence 2012: 230-241 - [c57]Kamalesh Ghosh, Pallab Dasgupta, S. Ramesh:
Planning with Action Prioritization and New Benchmarks for Classical Planning. Australasian Conference on Artificial Intelligence 2012: 779-790 - [c56]Srobona Mitra, Ansuman Banerjee, Pallab Dasgupta:
Formal methods for ranking counterexamples through assumption mining. DATE 2012: 911-916 - [c55]Aritra Hazra, Priyankar Ghosh, Pallab Dasgupta:
Reliability annotations to formal specifications of context-sensitive safety properties in embedded systems. FDL 2012: 36-43 - [c54]Rajdeep Mukherjee, Priyankar Ghosh, N. Sravan Kumar, Pallab Dasgupta, Ajit Pal:
Multi-objective Low-Power CDFG Scheduling Using Fine-Grained DVS Architecture in Distributed Framework. ISED 2012: 267-271 - [c53]Priyankar Ghosh, P. P. Chakrabarti, Pallab Dasgupta:
Execution Ordering in AND/OR Graphs with Failure Probabilities. SOCS 2012: 41-48 - [c52]Arun Dobriyal, Rahul Gonnabattula, Pallab Dasgupta, Chittaranjan A. Mandal:
Workload Driven Power Domain Partitioning. VDAT 2012: 147-155 - [c51]Debjit Pal
A Library for Passive Online Verification of Analog and Mixed-Signal Circuits. VLSI Design 2012: 364-369 - 2011
- [j36]Manoj G. Dixit, S. Ramesh, Pallab Dasgupta:
Some results on Parametric Temporal Logic. Inf. Process. Lett. 111(20): 994-998 (2011) - [j35]Padmalochan Bera, Soumya Kanti Ghosh, Pallab Dasgupta:
A WLAN security management framework based on formal spatio-temporal RBAC model. Secur. Commun. Networks 4(9): 981-993 (2011) - [j34]Subhankar Mukherjee, Pallab Dasgupta, Siddhartha Mukhopadhyay:
Auxiliary Specifications for Context-Sensitive Monitoring of AMS Assertions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(10): 1446-1457 (2011) - [j33]Antara Ain, Debjit Pal
Chassis: A Platform for Verifying PMU Integration Using Autogenerated Behavioral Models. ACM Trans. Design Autom. Electr. Syst. 16(3): 33:1-33:30 (2011) - [c50]Anvesh Komuravelli, Srobona Mitra, Ansuman Banerjee, Pallab Dasgupta:
Backward Reasoning with Formal Properties: A Methodology for Bug Isolation on Simulation Traces. Asian Test Symposium 2011: 238-243 - [c49]Priyankar Ghosh, Aritra Hazra, Niraj Bhilegaonkar, Pallab Dasgupta, Chittaranjan A. Mandal, Krishna Paul:
POWER-SIM: An SOC Simulator for Estimating Power Profiles of Mobile Workloads. ISED 2011: 273-278 - [c48]Subhankar Mukherjee, Pallab Dasgupta:
Auxiliary State Machines and Auxiliary Functions: Constructs for Extending AMS Assertions. VLSI Design 2011: 52-57 - 2010
- [j32]Padmalochan Bera, Santosh K. Ghosh, Pallab Dasgupta:
Integrated security analysis framework for an enterprise network - a formal approach. IET Inf. Secur. 4(4): 283-300 (2010) - [j31]Rajdeep Mukhopadhyay, Anvesh Komuravelli, Pallab Dasgupta, Subrat Kumar Panda, Siddhartha Mukhopadhyay:
A static verification approach for architectural integration of mixed-signal integrated circuits. Integr. 43(1): 58-71 (2010) - [j30]Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta:
Bounded delay timing analysis and power estimation using SAT. Microelectron. J. 41(5): 317-324 (2010) - [j29]Padmalochan Bera, Soumya Kanti Ghosh, Pallab Dasgupta:
Policy Based Security Analysis in Enterprise Networks: A Formal Approach. IEEE Trans. Netw. Serv. Manag. 7(4): 231-243 (2010) - [c47]Padmalochan Bera, Soumya Maity, Soumya Kanti Ghosh, Pallab Dasgupta:
A Query based Formal Security Analysis Framework for Enterprise LAN. CIT 2010: 407-414 - [c46]P. V. Rajkumar, Soumya Kanti Ghosh, Pallab Dasgupta:
Concurrent Usage Control Implementation Verification Using the SPIN Model Checker. CNSA 2010: 214-223 - [c45]Padmalochan Bera, Soumya Maity, Soumya Kanti Ghosh, Pallab Dasgupta:
A SAT Based Verification Framework for Wireless LAN Security Policy Management Supported by STRBAC Model. CNSA 2010: 232-241 - [c44]Aritra Hazra, Srobona Mitra, Pallab Dasgupta, Ajit Pal, Debabrata Bagchi, Kaustav Guha:
Leveraging UPF-extracted assertions for modeling and formal verification of architectural power intent. DAC 2010: 773-776 - [c43]Manoj G. Dixit, Pallab Dasgupta, S. Ramesh:
Taming the component timing: A CBD methodology for real-time embedded systems. DATE 2010: 1649-1652 - [c42]Padmalochan Bera, Soumya Kanti Ghosh, Pallab Dasgupta:
A Spatio-Temporal Role-Based Access Control Model for Wireless LAN Security Policy Management. ICISTM 2010: 76-88 - [c41]Aritra Hazra, Priyankar Ghosh, Pallab Dasgupta, Partha Pratim Chakrabarti:
Coverage Management with Inline Assertions and Formal Test Points. VLSI Design 2010: 140-145 - [c40]Arijit Mondal, Partha Pratim Chakrabarti, Pallab Dasgupta:
Accelerating Synchronous Sequential Circuits Using an Adaptive Clock. VLSI Design 2010: 176-181 - [i1]Priyankar Ghosh, Pallab Dasgupta:
Detecting Ontological Conflicts in Protocols between Semantic Web Services. CoRR abs/1011.0950 (2010)
2000 – 2009
- 2009
- [j28]Arnab Sinha, Pallab Dasgupta, Bhaskar Pal, Sayantan Das, Prasenjit Basu, P. P. Chakrabarti:
Design intent coverage revisited. ACM Trans. Design Autom. Electr. Syst. 14(1): 9:1-9:32 (2009) - [j27]Rajdeep Mukhopadhyay, Subrat Kumar Panda, Pallab Dasgupta, John Gough:
Instrumenting AMS assertion verification on commercial platforms. ACM Trans. Design Autom. Electr. Syst. 14(2): 21:1-21:47 (2009) - [c39]Subhankar Mukherjee, Antara Ain, Subrat Kumar Panda, Rajdeep Mukhopadhyay, Pallab Dasgupta:
A formal approach for specification-driven AMS behavioral model generation. DATE 2009: 1512-1517 - [c38]Padmalochan Bera, Soumya Kanti Ghosh, Pallab Dasgupta:
Formal Verification of Security Policy Implementations in Enterprise Networks. ICISS 2009: 117-131 - [c37]Padmalochan Bera, Soumya Kanti Ghosh, Pallab Dasgupta:
Fault Analysis of Security Policy Implementations in Enterprise Networks. NetCoM 2009: 240-245 - [c36]Aritra Hazra, Priyankar Ghosh, Pallab Dasgupta, Partha Pratim Chakrabarti:
Inline Assertions - Embedding Formal Properties in a Test Bench. VLSI Design 2009: 71-76 - 2008
- [j26]Bhaskar Pal, Ansuman Banerjee, Arnab Sinha, Pallab Dasgupta:
Accelerating Assertion Coverage With Adaptive Testbenches. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(5): 967-972 (2008) - [j25]Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti:
Auxiliary state machines + context-triggered properties in verification. ACM Trans. Design Autom. Electr. Syst. 13(4): 62:1-62:31 (2008) - [j24]Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta:
Satisfiability Models for Maximum Transition Power. IEEE Trans. Very Large Scale Integr. Syst. 16(8): 941-951 (2008) - [c35]Ansuman Banerjee, Sayak Ray, Pallab Dasgupta, Partha Pratim Chakrabarti, S. Ramesh, P. Vignesh V. Ganesan:
A Dynamic Assertion-Based Verification Platform for Validation of UML Designs. ATVA 2008: 222-227 - [c34]Ansuman Banerjee, Kausik Datta, Pallab Dasgupta:
CheckSpec: A Tool for Consistency and Coverage Analysis of Assertion Specifications. ATVA 2008: 228-233 - [c33]Aritra Hazra, Ansuman Banerjee, Srobona Mitra, Pallab Dasgupta, Partha Pratim Chakrabarti, Chunduri Rama Mohan:
Cohesive Coverage Management for Simulation and Formal Property Verification. ISVLSI 2008: 251-256 - 2007
- [j23]Arijit Mondal, Partha Pratim Chakrabarti, Pallab Dasgupta:
Statistical static timing analysis using symbolic event propagation. IET Circuits Devices Syst. 1(4): 283-291 (2007) - [j22]Bhaskar Pal, Arnab Sinha, Pallab Dasgupta, P. P. Chakrabarti, Kaushik De:
Hardware accelerated constrained random test generation. IET Comput. Digit. Tech. 1(4): 423-433 (2007) - [j21]Bhaskar Pal, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti:
BUSpec: A framework for generation of verification aids for standard bus protocol specifications. Integr. 40(3): 285-304 (2007) - [j20]Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta:
Event propagation for accurate circuit delay calculation using SAT. ACM Trans. Design Autom. Electr. Syst. 12(3): 36:1-36:23 (2007) - [c32]Arijit Mondal, P. P. Chakrabarti, Pallab Dasgupta:
Timing Analysis of Sequential Circuits Using Symbolic Event Propagation. ICCTA 2007: 151-157 - [c31]Sayak Ray, Pallab Dasgupta, P. P. Chakrabarti:
A New Pseudo-Boolean Satisfiability based approach to Power Mode Schedulability Analysis. VLSI Design 2007: 95-102 - [c30]Suchismita Roy, P. P. Chakrabarti, Pallab Dasgupta:
Bounded Delay Timing Analysis Using Boolean Satisfiability. VLSI Design 2007: 295-302 - 2006
- [j19]Prasenjit Basu, Sayantan Das, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni:
Design-Intent Coverage - A New Paradigm for Formal Property Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(10): 1922-1934 (2006) - [c29]Prasenjit Basu, Sayantan Das, Pallab Dasgupta, Partha Pratim Chakrabarti:
Discovering the input assumptions in specification refinement coverage. ASP-DAC 2006: 13-18 - [c28]Ansuman Banerjee, Bhaskar Pal, Sayantan Das, Abhijeet Kumar, Pallab Dasgupta:
Test generation games from formal specifications. DAC 2006: 827-832 - [c27]Sayantan Das, Rizi Mohanty, Pallab Dasgupta, P. P. Chakrabarti:
Synthesis of system verilog assertions. DATE Designers' Forum 2006: 70-75 - [c26]Sayantan Das, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti:
What lies between design intent coverage and model checking? DATE 2006: 1217-1222 - [c25]Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti:
Formal methods for checking realizability of coalitions in 3-party systems. MEMOCODE 2006: 198 - [c24]Diganchal Chakraborty, P. P. Chakrabarti, Arijit Mondal, Pallab Dasgupta:
A Framework for Estimating Peak Power in Gate-Level Circuits. PATMOS 2006: 573-582 - [c23]Samik Das, P. P. Chakrabarti, Pallab Dasgupta:
Instruction-Set-Extension Exploration Using Decomposable Heuristic Search. VLSI Design 2006: 293-298 - 2005
- [j18]Ansuman Banerjee, Pallab Dasgupta:
The open family of temporal logics: Annotating temporal operators with input constraints. ACM Trans. Design Autom. Electr. Syst. 10(3): 492-522 (2005) - [c22]Suchismita Roy, Sayantan Das, Prasenjit Basu, Pallab Dasgupta, Partha Pratim Chakrabarti:
SAT based solutions for consistency problems in formal property specifications for open systems. ICCAD 2005: 885-888 - [c21]Sayantan Das, Ansuman Banerjee, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix:
Formal Methods for Analyzing the Completeness of an Assertion Suite against a High-Level Fault Model. VLSI Design 2005: 201-206 - [c20]Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti:
Syntactic Transformation of Assume-Guarantee Assertions: From Sub-Modules to Modules. VLSI Design 2005: 213-218 - 2004
- [j17]Krishnendu Chatterjee, Pallab Dasgupta, P. P. Chakrabarti:
The power of first-order quantification over states in branching and linear time temporal logics. Inf. Process. Lett. 91(5): 201-210 (2004) - [c19]Prasenjit Basu, Sayantan Das, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix:
Formal Verification Coverage: Are the RTL-Properties Covering the Design's Architectural Intent? DATE 2004: 668-669 - [c18]Sayantan Das, Prasenjit Basu, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni:
Formal verification coverage: computing the coverage gap between temporal specifications. ICCAD 2004: 198-203 - [c17]Krishnendu Chatterjee, Pallab Dasgupta, P. P. Chakrabarti:
Complexity of Compositional Model Checking of Computation Tree Logic on Simple Structures. IWDC 2004: 102-113 - [c16]Bhaskar Pal, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti:
The BUSpec platform for automated generation of verification aids for standard bus protocols. MEMOCODE 2004: 119-128 - [c15]Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti:
Formal Verification of Modules under Real Time Environment Constraints. VLSI Design 2004: 103-108 - [c14]Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan:
Property Refinement Techniques for Enhancing Coverage of Formal Property Verification. VLSI Design 2004: 109-114 - 2003
- [j16]Krishnendu Chatterjee
A Branching Time Temporal Framework for Quantitative Reasoning. J. Autom. Reason. 30(2): 205-232 (2003) - [c13]Ansuman Banerjee, Pallab Dasgupta, Partha Pratim Chakrabarti:
Open computation tree logic with fairness. ISCAS (5) 2003: 249-252 - 2002
- [j15]Anindya C. Patthak, Indrajit Bhattacharya, Anirban Dasgupta, Pallab Dasgupta, P. P. Chakrabarti:
Quantified Computation Tree Logic. Inf. Process. Lett. 82(3): 123-129 (2002) - [j14]Pallab Dasgupta, P. P. Chakrabarti, Arnab Dey, Sujoy Ghose, Wolfgang Bibel:
Solving Constraint Optimization Problems from CLP-Style Specifications Using Heuristic Search Techniques. IEEE Trans. Knowl. Data Eng. 14(2): 353-368 (2002) - [c12]Arindam Chakrabarti, Pallab Dasgupta, P. P. Chakrabarti, Ansuman Banerjee:
Formal verification of module interfaces against real time specifications. DAC 2002: 141-145 - [c11]Pallab Dasgupta, Arindam Chakrabarti, P. P. Chakrabarti:
Open Computation Tree Logic for Formal Verification of Modules. ASP-DAC/VLSI Design 2002: 735-740 - 2001
- [j13]Pallab Dasgupta, P. P. Chakrabarti, Jatindra Kumar Deka, Sriram Sankaranarayanan:
Min-max Computation Tree Logic. Artif. Intell. 127(1): 137-162 (2001) - [c10]Pallab Dasgupta, P. P. Chakrabarti, Amit Nandi, Sekar Krishna, Arindam Chakrabarti:
Abstraction of word-level linear arithmetic functions from bit-level component descriptions. DATE 2001: 4-8 - [c9]S. Sriram, R. Tandon, Pallab Dasgupta, P. P. Chakrabarti:
Symbolic verification of Boolean constraints over partially specified functions. ISCAS (5) 2001: 113-116 - [c8]Jatindra Kumar Deka, S. Chaki, Pallab Dasgupta, P. P. Chakrabarti:
Abstractions for model checking of event timings. ISCAS (5) 2001: 125-128 - 2000
- [j12]Pallab Dasgupta, Jatindra Kumar Deka, Partha Pratim Chakrabarti:
Model checking on timed-event structures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(5): 601-611 (2000)
1990 – 1999
- 1999
- [b1]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar:
Multiobjective heuristic search - an introduction to intelligent search methods for multicriteria optimization. Computational intelligence, Vieweg 1999, ISBN 978-3-528-05708-4, pp. 1-134 - [c7]Prashanti Das, Dibyendu Das, Pallab Dasgupta:
Adaptive Algorithms for Scheduling Static Task Graphs in Dynamic Distributed Systems. HiPC 1999: 143-150 - [c6]Partha Pratim Chakrabarti, Pallab Dasgupta, Partha Pratim Das, Arnob Roy, Shuvendu K. Lahiri, Mrinal Bose:
Controlling State Explosion in Static Simulation by Selective Composition. VLSI Design 1999: 226-231 - [c5]Jatindra Kumar Deka, Pallab Dasgupta, P. P. Chakrabarti:
An Efficiently Checkable Subset of TCTL for Formal Verification of Transition Systems with Delays. VLSI Design 1999: 294-299 - [c4]Pankaj Chauhan, Pallab Dasgupta, P. P. Chakrabarti:
Exploiting Isomorphism for Compaction and Faster Simulation of Binary Decision Diagrams. VLSI Design 1999: 324- - 1998
- [j11]Pallab Dasgupta:
Agreement under Faulty Interfaces. Inf. Process. Lett. 65(3): 125-129 (1998) - [j10]Dibyendu Das, Pallab Dasgupta, Prashanti Das:
A Heuristic for the Maximum Processor Requirement for Scheduling Layered Task Graphs with Coloring. J. Parallel Distributed Comput. 49(2): 169-181 (1998) - 1997
- [j9]Pallab Dasgupta, A. K. Majumder, P. Bhattacharya:
V_THR: An Adaptive Load Balancing Algorithm. J. Parallel Distributed Comput. 42(2): 101-108 (1997) - 1996
- [j8]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar:
Searching Game Trees under a Partial Order. Artif. Intell. 82(1-2): 237-257 (1996) - [j7]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar:
Searching Game Trees under a Partial Order. J. Int. Comput. Games Assoc. 19(2): 101 (1996) - [j6]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar:
Agent Search in Uniform b-Ary Trees: Multiple Goals and Unequal Costs. Inf. Process. Lett. 58(6): 311-318 (1996) - [j5]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar:
Multiobjektive Heuristic Search in AND/OR Graphs. J. Algorithms 20(2): 282-311 (1996) - [c3]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar:
A New Competitive Algorithm for Agent Searching in Unknown Streets. FSTTCS 1996: 147-155 - 1995
- [j4]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar:
A Correction to "Agent Searching in a Tree and the Optimality of Iterative Deepening". Artif. Intell. 77(1): 173-176 (1995) - [j3]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar:
Utility of Pathmax in Partial Order Heuristic Search. Inf. Process. Lett. 55(6): 317-322 (1995) - [c2]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar:
A Near Optimal Algorithm for the Extended Cow-Path Problem in the Presence of Relative Errors. FSTTCS 1995: 22-36 - 1994
- [j2]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar:
Agent Searching in a Tree and the Optimality of Iterative Deepening. Artif. Intell. 71(1): 195-208 (1994) - [j1]Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar:
Agent Searching in a Tree and the Optimality of Iterative Deepening. J. Int. Comput. Games Assoc. 17(4): 222 (1994) - [c1]Pallab Dasgupta, Prasenjit Mitra, P. P. Chakrabarti, S. C. De Sarkar:
Multiobjective Search in VLSI Design. VLSI Design 1994: 395-400
Coauthor Index
P. P. Chakrabarti 0001
aka: Partha Pratim Chakrabarti
aka: Partha Pratim Chakrabarti
[c108] [i18] [c104] [i12] [j62] [c75] [i4] [c69] [i3] [j56] [c68] [c67] [c64] [j47] [j45] [j44] [j42] [j37] [c58] [c53] [j30] [c41] [c40] [j28] [c36] [j25] [j24] [c35] [c33] [j23] [j22] [j21] [j20] [c32] [c31] [c30] [j19] [c29] [c27] [c26] [c25] [c24] [c23] [c22] [c21] [c20] [j17] [c19] [c18] [c17] [c16] [c15] [c14] [j16] [c13] [j15] [j14] [c12] [c11] [j13] [c10] [c9] [c8] [j12] [b1] [c6] [c5] [c4] [j8] [j7] [j6] [j5] [c3] [j4] [j3] [c2] [j2] [j1] [c1]
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