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Andreas Moshovos
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- affiliation: University of Toronto, Canada
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2020 – today
- 2024
- [c101]Alberto Delmas Lascorz
, Mostafa Mahmoud
Atalanta: A Bit is Worth a "Thousand" Tensor Values. ASPLOS (2) 2024: 85-102 - [c100]Eugene Sha
Marple: Scalable Spike Sorting for Untethered Brain-Machine Interfacing. ASPLOS (2) 2024: 666-682 - [c99]Milos Nikolic, Ghouthi Boukli Hacene, Ciaran Bannon, Alberto Delmas Lascorz, Matthieu Courbariaux, Omar Mohamed Awad, Isak Edo Vivancos, Yoshua Bengio, Vincent Gripon, Andreas Moshovos:
BitPruning: Learning Bitlengths for Aggressive and Accurate Quantization. ISCAS 2024: 1-5 - [c98]Milos Nikolic, Enrique Torres-Sánchez, Jiahui Wang, Ali Hadi Zadeh, Mostafa Mahmoud, Ameer Abdelhadi, Kareem Ibrahim, Andreas Moshovos:
Schrodinger's FP Training Neural Networks with Dynamic Floating-Point Containers. MLSys 2024 - [i19]Cheng Chen, Christina Giannoula, Andreas Moshovos:
Low-Bitwidth Floating Point Quantization for Efficient High-Quality Diffusion Models. CoRR abs/2408.06995 (2024) - 2023
- [j22]Rahul Gulve
39 000-Subexposures/s Dual-ADC CMOS Image Sensor With Dual-Tap Coded-Exposure Pixels for Single-Shot HDR and 3-D Computational Imaging. IEEE J. Solid State Circuits 58(11): 3150-3163 (2023) - [c97]Mohamed A. Elgammal
cuSCNN : an Efficient CUDA Implementation of Sparse CNNs. HEART 2023: 107-113 - 2022
- [c96]Ameer Abdelhadi, Eugene Sha, Andreas Moshovos:
A Massive-Scale Brain Activity Decoding Chip. HCS 2022: 1-65 - [c95]Ali Hadi Zadeh
Mokey: enabling narrow fixed-point inference for out-of-the-box floating-point transformer models. ISCA 2022: 888-901 - [c94]Rahul Gulve, Navid Sarhangnejad, Gairik Dutta, Motasem Sakr, Don Nguyen, Roberto Rangel, Wenzheng Chen, Zhengfan Xia, Mian Wei, Nikita Gusev, Esther Y. H. Lin, Xiaonong Sun, Leo Hanxu, Nikola Katic, Ameer Abdelhadi, Andreas Moshovos, Kiriakos N. Kutulakos, Roman Genov:
A 39, 000 Subexposures/s CMOS Image Sensor with Dual-tap Coded-exposure Data-memory Pixel for Adaptive Single-shot Computational Imaging. VLSI Technology and Circuits 2022: 78-79 - [i18]Alberto Delmas Lascorz, Mostafa Mahmoud, Andreas Moshovos:
APack: Off-Chip, Lossless Data Compression for Efficient Deep Learning Inference. CoRR abs/2201.08830 (2022) - [i17]Ali Hadi Zadeh, Mostafa Mahmoud, Ameer Abdelhadi, Andreas Moshovos:
Mokey: Enabling Narrow Fixed-Point Inference for Out-of-the-Box Floating-Point Transformer Models. CoRR abs/2203.12758 (2022) - [i16]Milos Nikolic, Enrique Torres-Sánchez, Jiahui Wang, Ali Hadi Zadeh, Mostafa Mahmoud, Ameer Abdelhadi, Andreas Moshovos:
Schrödinger's FP: Dynamic Adaptation of Floating-Point Containers for Deep Learning Training. CoRR abs/2204.13666 (2022) - 2021
- [c93]Ameer M. S. Abdelhadi, Eugene Sha, Ciaran Bannon, Hendrik Steenland, Andreas Moshovos:
Noema: Hardware-Efficient Template Matching for Neural Population Pattern Detection. MICRO 2021: 522-534 - [c92]Omar Mohamed Awad, Mostafa Mahmoud, Isak Edo, Ali Hadi Zadeh
FPRaker: A Processing Element For Accelerating Neural Network Training. MICRO 2021: 857-869 - [c91]Isak Edo Vivancos, Sayeh Sharify, Daniel Ly-Ma, Ameer Abdelhadi, Ciaran Bannon, Milos Nikolic, Mostafa Mahmoud, Alberto Delmas Lascorz, Gennady Pekhimenko, Andreas Moshovos:
Boveda: Building an On-Chip Deep Learning Memory Hierarchy Brick by Brick. MLSys 2021 - 2020
- [c90]Isak Edo Vivancos, Sayeh Sharify, Milos Nikolic, Ciaran Bannon, Mostafa Mahmoud, Alberto Delmas Lascorz, Andreas Moshovos:
Late Breaking Results: Building an On-Chip Deep Learning Memory Hierarchy Brick by Brick. DAC 2020: 1-2 - [c89]Mostafa Mahmoud, Isak Edo, Ali Hadi Zadeh
TensorDash: Exploiting Sparsity to Accelerate Deep Neural Network Training. MICRO 2020: 781-795 - [c88]Ali Hadi Zadeh
GOBO: Quantizing Attention-Based NLP Models for Low Latency and Energy Efficient Inference. MICRO 2020: 811-824 - [i15]Milos Nikolic, Ghouthi Boukli Hacene, Ciaran Bannon, Alberto Delmas Lascorz, Matthieu Courbariaux, Yoshua Bengio, Vincent Gripon, Andreas Moshovos:
BitPruning: Learning Bitlengths for Aggressive and Accurate Quantization. CoRR abs/2002.03090 (2020) - [i14]Ali Hadi Zadeh, Andreas Moshovos:
GOBO: Quantizing Attention-Based NLP Models for Low Latency and Energy Efficient Inference. CoRR abs/2005.03842 (2020) - [i13]Mostafa Mahmoud, Isak Edo Vivancos, Ali Hadi Zadeh, Omar Mohamed Awad, Gennady Pekhimenko, Jorge Albericio, Andreas Moshovos:
TensorDash: Exploiting Sparsity to Accelerate Deep Neural Network Training and Inference. CoRR abs/2009.00748 (2020) - [i12]Omar Mohamed Awad, Mostafa Mahmoud, Isak Edo Vivancos, Ali Hadi Zadeh, Ciaran Bannon, Anand Jayarajan, Gennady Pekhimenko, Andreas Moshovos:
FPRaker: A Processing Element For Accelerating Neural Network Training. CoRR abs/2010.08065 (2020)
2010 – 2019
- 2019
- [j21]Mostafa Mahmoud, Dylan Malone Stuart, Zissis Poulos, Alberto Delmas Lascorz, Patrick Judd, Sayeh Sharify, Milos Nikolic, Kevin Siu, Isak Edo Vivancos, Jorge Albericio, Andreas Moshovos:
Accelerating Image-Sensor-Based Deep Learning Applications. IEEE Micro 39(5): 26-35 (2019) - [c87]Alberto Delmas Lascorz, Patrick Judd, Dylan Malone Stuart, Zissis Poulos, Mostafa Mahmoud, Sayeh Sharify, Milos Nikolic, Kevin Siu, Andreas Moshovos:
Bit-Tactical: A Software/Hardware Approach to Exploiting Value and Bit Sparsity in Neural Networks. ASPLOS 2019: 749-763 - [c86]Meysam Roodi, Zahra Lak, Andreas Moshovos:
BWA-MEM Performance: Suffix Array Storage Size. BHI 2019: 1-4 - [c85]Meysam Roodi, Andreas Moshovos:
MemAlign: A Memory Structure to Accelerate Gene Sequencing. BIBE 2019: 157-164 - [c84]Meysam Roodi, Andreas Moshovos:
SW+: On Accelerating Smith-Waterman Execution of GATK HaplotypeCaller. CIBB 2019: 133-141 - [c83]Ali Hadi Zadeh
Deep Learning Language Modeling Workloads: Where Time Goes on Graphics Processors. IISWC 2019: 131-142 - [c82]Sayeh Sharify, Alberto Delmas Lascorz, Mostafa Mahmoud, Milos Nikolic, Kevin Siu, Dylan Malone Stuart, Zissis Poulos, Andreas Moshovos:
Laconic deep learning inference acceleration. ISCA 2019: 304-317 - [c81]Milos Nikolic, Mostafa Mahmoud, Andreas Moshovos, Yiren Zhao, Robert D. Mullins:
Characterizing Sources of Ineffectual Computations in Deep Learning Networks. ISPASS 2019: 165-176 - [c80]Alberto Delmas Lascorz, Sayeh Sharify, Isak Edo Vivancos, Dylan Malone Stuart, Omar Mohamed Awad, Patrick Judd, Mostafa Mahmoud, Milos Nikolic, Kevin Siu, Zissis Poulos, Andreas Moshovos:
ShapeShifter: Enabling Fine-Grain Data Width Adaptation in Deep Learning. MICRO 2019: 28-41 - [i11]Zissis Poulos, Ali Nouri, Andreas Moshovos:
Training CNNs faster with Dynamic Input and Kernel Downsampling. CoRR abs/1910.06548 (2019) - 2018
- [j20]Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Zissis Poulos, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger
Exploiting Typical Values to Accelerate Deep Learning. Computer 51(5): 18-30 (2018) - [j19]Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger
Value-Based Deep-Learning Acceleration. IEEE Micro 38(1): 41-55 (2018) - [j18]Patrick Judd
Proteus: Exploiting precision variability in deep neural networks. Parallel Comput. 73: 40-51 (2018) - [c79]Sayeh Sharify, Alberto Delmas Lascorz, Kevin Siu, Patrick Judd, Andreas Moshovos:
Loom: exploiting weight and activation precisions to accelerate convolutional neural networks. DAC 2018: 20:1-20:6 - [c78]Meysam Roodi, Andreas Moshovos:
Gene Sequencing: Where Time Goes. IISWC 2018: 84-85 - [c77]Milos Nikolic, Mostafa Mahmoud, Andreas Moshovos:
Characterizing Sources of Ineffectual Computations in Deep Learning Networks. IISWC 2018: 86-87 - [c76]Kevin Siu, Dylan Malone Stuart, Mostafa Mahmoud, Andreas Moshovos:
Memory Requirements for Convolutional Neural Network Hardware Accelerators. IISWC 2018: 111-121 - [c75]Andreas Moshovos:
Value-Based Deep Learning Hardware Acceleration. NoCArc@MICRO 2018: 1 - [c74]Mostafa Mahmoud, Kevin Siu, Andreas Moshovos:
Diffy: a Déjà vu-Free Differential Deep Neural Network Accelerator. MICRO 2018: 134-147 - [c73]Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas, Sayeh Sharify, Mostafa Mahmoud, Tayler H. Hetherington, Milos Nikolic, Dylan Malone Stuart, Kevin Siu, Zissis Poulos, Tor M. Aamodt, Natalie D. Enright Jerger
Identifying and Exploiting Ineffectual Computations to Enable Hardware Acceleration of Deep Learning. NEWCAS 2018: 356-360 - [i10]Alberto Delmas, Patrick Judd, Dylan Malone Stuart, Zissis Poulos, Mostafa Mahmoud, Sayeh Sharify, Milos Nikolic, Andreas Moshovos:
Bit-Tactical: Exploiting Ineffectual Computations in Convolutional Neural Networks: Which, Why, and How. CoRR abs/1803.03688 (2018) - [i9]Alberto Delmas, Sayeh Sharify, Patrick Judd, Milos Nikolic, Andreas Moshovos:
DPRed: Making Typical Activation Values Matter In Deep Learning Computing. CoRR abs/1804.06732 (2018) - [i8]Sayeh Sharify, Mostafa Mahmoud, Alberto Delmas Lascorz, Milos Nikolic, Andreas Moshovos:
Laconic Deep Learning Computing. CoRR abs/1805.04513 (2018) - 2017
- [j17]Patrick Judd, Jorge Albericio, Andreas Moshovos:
Stripes: Bit-Serial Deep Neural Network Computing. IEEE Comput. Archit. Lett. 16(1): 80-83 (2017) - [c72]Jorge Albericio, Patrick Judd, Alberto Delmas, Sayeh Sharify, Andreas Moshovos:
Bit-Pragmatic Deep Neural Network Computing. ICLR (Workshop) 2017 - [c71]Mostafa Mahmoud, Bojian Zheng, Alberto Delmas Lascorz, Felix Heide, Jonathan Assouline, Paul Boucher, Emmanuel Onzon, Andreas Moshovos:
IDEAL: image denoising accelerator. MICRO 2017: 82-95 - [c70]Jorge Albericio, Alberto Delmas, Patrick Judd, Sayeh Sharify, Gerard O'Leary, Roman Genov, Andreas Moshovos:
Bit-pragmatic deep neural network computing. MICRO 2017: 382-394 - [i7]Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Andreas Moshovos:
Cnvlutin2: Ineffectual-Activation-and-Weight-Free Deep Neural Network Computing. CoRR abs/1705.00125 (2017) - [i6]Alberto Delmas, Patrick Judd, Sayeh Sharify, Andreas Moshovos:
Dynamic Stripes: Exploiting the Dynamic Precision Requirements of Activation Values in Neural Networks. CoRR abs/1706.00504 (2017) - [i5]Sayeh Sharify, Alberto Delmas Lascorz, Patrick Judd, Andreas Moshovos:
Loom: Exploiting Weight and Activation Precisions to Accelerate Convolutional Neural Networks. CoRR abs/1706.07853 (2017) - [i4]Alberto Delmas, Sayeh Sharify, Patrick Judd, Andreas Moshovos:
Tartan: Accelerating Fully-Connected and Convolutional Layers in Deep Learning Networks by Exploiting Numerical Precision Variability. CoRR abs/1707.09068 (2017) - 2016
- [c69]Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger
Proteus: Exploiting Numerical Precision Variability in Deep Neural Networks. ICS 2016: 23:1-23:12 - [c68]Mostafa Mahmoud, Andreas Moshovos:
Memory controller design under cloud workloads. IISWC 2016: 188-198 - [c67]Jorge Albericio, Patrick Judd, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger
Cnvlutin: Ineffectual-Neuron-Free Deep Neural Network Computing. ISCA 2016: 1-13 - [c66]Andreas Moshovos:
Message from the program chair. ISPASS 2016: vii - [c65]Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Andreas Moshovos:
Stripes: Bit-serial deep neural network computing. MICRO 2016: 19:1-19:12 - [i3]Jorge Albericio, Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Andreas Moshovos:
Bit-pragmatic Deep Neural Network Computing. CoRR abs/1610.06920 (2016) - [i2]Mostafa Mahmoud, Andreas Moshovos:
Memory Controller Design Under Cloud Workloads. CoRR abs/1611.10316 (2016) - 2015
- [c64]Misel-Myrto Papadopoulou, Xin Tong, André Seznec, Andreas Moshovos:
Prediction-based superpage-friendly TLB designs. HPCA 2015: 210-222 - [c63]Xin Tong, Andreas Moshovos:
QTrace: a framework for customizable full system instrumentation. ISPASS 2015: 245-255 - [c62]Joshua San Miguel, Jorge Albericio, Andreas Moshovos, Natalie D. Enright Jerger
Doppelgänger: a cache for approximate computing. MICRO 2015: 50-61 - [c61]Islam Atta, Xin Tong, Vijayalakshmi Srinivasan, Ioana Baldini, Andreas Moshovos:
Self-contained, accurate precomputation prefetching. MICRO 2015: 153-165 - [i1]Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Raquel Urtasun, Andreas Moshovos:
Reduced-Precision Strategies for Bounded Memory in Deep Neural Nets. CoRR abs/1511.05236 (2015) - 2014
- [j16]Pinar Tözün
ADDICT: Advanced Instruction Chasing for Transactions. Proc. VLDB Endow. 7(14): 1893-1904 (2014) - [j15]Xin Tong, Toshihiko Koju, Motohiro Kawahito, Andreas Moshovos:
Optimizing Memory Translation Emulation in Full System Emulators. ACM Trans. Archit. Code Optim. 11(4): 60:1-60:24 (2014) - [c60]Kaveh Aasaraai, Andreas Moshovos:
An Architectural Approach to Characterizing and Eliminating Sources of Inefficiency in a Soft Processor Design. FCCM 2014: 169 - [c59]Di Wu, Andreas Moshovos:
Image Signal Processors on FPGAs. FCCM 2014: 176 - [c58]Xin Tong, Andreas Moshovos:
BarTLB: Barren page resistant TLB for managed runtime languages. ICCD 2014: 270-277 - [c57]Jorge Albericio, Joshua San Miguel, Natalie D. Enright Jerger
Wormhole: Wisely Predicting Multidimensional Branches. MICRO 2014: 509-520 - [c56]Kaveh Aasaraai, Andreas Moshovos:
What limits the operating frequency of a soft processor design. ReConFig 2014: 1-6 - [c55]Di Wu, Andreas Moshovos:
Advanced branch predictors for soft processors. ReConFig 2014: 1-6 - [c54]Goran Narancic, Patrick Judd, Di Wu, Islam Atta, Michel Elnacouzi, Jason Zebchuk, Jorge Albericio, Natalie D. Enright Jerger
Evaluating the memory system behavior of smartphone workloads. ICSAMOS 2014: 83-92 - 2013
- [c53]Michel El-Nacouzi, Islam Atta, Myrto Papadopoulou, Jason Zebchuk, Natalie D. Enright Jerger, Andreas Moshovos:
A dual grain hit-miss detector for large die-stacked DRAM caches. DATE 2013: 89-92 - [c52]Vitaly Zakharenko, Tor M. Aamodt, Andreas Moshovos:
Characterizing the performance benefits of fused CPU/GPU systems using FusionSim. DATE 2013: 685-688 - [c51]Di Wu, Kaveh Aasaraai, Andreas Moshovos:
Low-cost, high-performance branch predictors for soft processors. FPL 2013: 1-6 - [c50]Jason Zebchuk, Harold W. Cain, Xin Tong, Vijayalakshmi Srinivasan, Andreas Moshovos:
RECAP: A region-based cure for the common cold (cache). HPCA 2013: 83-94 - [c49]Islam Atta, Pinar Tözün
STREX: boosting instruction cache reuse in OLTP workloads through stratified transaction execution. ISCA 2013: 273-284 - [c48]Xin Tong, Jack Luo, Andreas Moshovos:
QTrace: An interface for customizable full system instrumentation. ISPASS 2013: 132-133 - [c47]Jason Zebchuk, Babak Falsafi, Andreas Moshovos:
Multi-grain coherence directories. MICRO 2013: 359-370 - 2012
- [j14]Kaveh Aasaraai, Andreas Moshovos:
NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution. Int. J. Reconfigurable Comput. 2012: 915178:1-915178:12 (2012) - [c46]Ioana Burcea, Livio Soares, Andreas Moshovos:
Pointy: a hybrid pointer prefetcher for managed runtime systems. PACT 2012: 97-106 - [c45]Jason Zebchuk, Harold W. Cain, Vijayalakshmi Srinivasan, Andreas Moshovos:
ReCaP: a region-based cure for the common cold cache. PACT 2012: 443-444 - [c44]Islam Atta, Pinar Tözün
Reducing OLTP instruction misses with thread migration. DaMoN 2012: 9-15 - [c43]Maryam Sadooghi-Alvandi, Kaveh Aasaraai, Andreas Moshovos:
Toward virtualizing branch direction prediction. DATE 2012: 455-460 - [c42]Islam Atta, Pinar Tözün
SLICC: Self-Assembly of Instruction Cache Collectives for OLTP Workloads. MICRO 2012: 188-198 - [c41]Kaveh Aasaraai, Andreas Moshovos:
SPREX: A soft processor with Runahead execution. ReConFig 2012: 1-7 - 2011
- [j13]Elham Safi, Andreas Moshovos, Andreas G. Veneris:
Two-Stage, Pipelined Register Renaming. IEEE Trans. Very Large Scale Integr. Syst. 19(10): 1926-1931 (2011) - [e3]Carlo Galuzzi, Luigi Carro, Andreas Moshovos, Milos Prvulovic:
44rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2011, Porto Alegre, Brazil, December 3-7, 2011. ACM 2011, ISBN 978-1-4503-1053-6 [contents] - 2010
- [j12]Thomas F. Wenisch, Michael Ferdman, Anastasia Ailamaki, Babak Falsafi, Andreas Moshovos:
Making Address-Correlated Prefetching Practical. IEEE Micro 30(1): 50-59 (2010) - [j11]Elham Safi, Andreas Moshovos, Andreas G. Veneris:
On the Latency and Energy of Checkpointed Superscalar Register Alias Tables. IEEE Trans. Very Large Scale Integr. Syst. 18(3): 365-377 (2010) - [c40]Kaveh Aasaraai, Andreas Moshovos:
Design space exploration of instruction schedulers for out-of-order soft processors. FPT 2010: 385-388 - [c39]Henry Wong, Misel-Myrto Papadopoulou, Maryam Sadooghi-Alvandi, Andreas Moshovos:
Demystifying GPU microarchitecture through microbenchmarking. ISPASS 2010: 235-246 - [c38]Kaveh Aasaraai, Andreas Moshovos:
An Efficient Non-blocking Data Cache for Soft Processors. ReConFig 2010: 19-24 - [e2]Andreas Moshovos, J. Gregory Steffan, Kim M. Hazelwood, David R. Kaeli:
Proceedings of the CGO 2010, The 8th International Symposium on Code Generation and Optimization, Toronto, Ontario, Canada, April 24-28, 2010. ACM 2010, ISBN 978-1-60558-635-9 [contents]
2000 – 2009
- 2009
- [c37]Ioana Burcea, Andreas Moshovos:
Phantom-BTB: a virtualized branch target buffer design. ASPLOS 2009: 313-324 - [c36]Kaveh Aasaraai, Andreas Moshovos:
Towards a viable out-of-order soft core: Copy-Free, checkpointed register renaming. FPL 2009: 79-85 - [c35]Thomas F. Wenisch, Michael Ferdman, Anastasia Ailamaki, Babak Falsafi, Andreas Moshovos:
Practical off-chip meta-data for temporal memory streaming. HPCA 2009: 79-90 - [c34]Jason Zebchuk, Vijayalakshmi Srinivasan, Moinuddin K. Qureshi, Andreas Moshovos:
A tagless coherence directory. MICRO 2009: 423-434 - [c33]Elham Safi, Andreas Moshovos, Andreas G. Veneris:
A physical-level study of the compacted matrix instruction scheduler for dynamically-scheduled superscalar processors. ICSAMOS 2009: 41-48 - 2008
- [j10]Elham Safi, Andreas Moshovos, Andreas G. Veneris:
L-CBF: A Low-Power, Fast Counting Bloom Filter Architecture. IEEE Trans. Very Large Scale Integr. Syst. 16(6): 628-638 (2008) - [c32]Ioana Burcea, Stephen Somogyi, Andreas Moshovos, Babak Falsafi:
Predictor virtualization. ASPLOS 2008: 157-167 - [c31]Patrick Akl, Andreas Moshovos:
Turbo-ROB: A Low Cost Checkpoint/Restore Accelerator. HiPEAC 2008: 258-272 - [c30]Thomas F. Wenisch, Michael Ferdman, Anastasia Ailamaki, Babak Falsafi, Andreas Moshovos:
Temporal streams in commercial server applications. IISWC 2008: 99-108 - [c29]Elham Safi, Andreas Moshovos, Andreas G. Veneris:
A physical level study and optimization of CAM-based checkpointed register alias table. ISLPED 2008: 233-236 - [c28]Michael Ferdman, Thomas F. Wenisch, Anastasia Ailamaki, Babak Falsafi, Andreas Moshovos:
Temporal instruction fetch streaming. MICRO 2008: 1-10 - [e1]Andreas Moshovos, David Tarditi, Kunle Olukotun:
17th International Conference on Parallel Architectures and Compilation Techniques, PACT 2008, Toronto, Ontario, Canada, October 25-29, 2008. ACM 2008, ISBN 978-1-60558-282-5 [contents] - 2007
- [j9]Jason Zebchuk, Andreas Moshovos:
A Building Block for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy. IEEE Comput. Archit. Lett. 6(2): 33-36 (2007) - [c27]Thomas F. Wenisch, Anastassia Ailamaki, Babak Falsafi, Andreas Moshovos:
Mechanisms for store-wait-free multiprocessors. ISCA 2007: 266-277 - [c26]Elham Safi, Patrick Akl, Andreas Moshovos, Andreas G. Veneris, Aggeliki Arapoyanni:
On the latency, energy and area of checkpointed, superscalar register alias tables. ISLPED 2007: 379-382 - [c25]Jason Zebchuk, Elham Safi, Andreas Moshovos:
A Framework for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy. MICRO 2007: 314-327 - 2006
- [j8]Jason F. Cantin, James E. Smith, Mikko H. Lipasti, Andreas Moshovos, Babak Falsafi:
Coarse-Grain Coherence Tracking: RegionScout and Region Coherence Arrays. IEEE Micro 26(1): 70-79 (2006) - [c24]Patrick Akl, Andreas Moshovos:
BranchTap: improving performance with very few checkpoints through adaptive speculation control. ICS 2006: 36-45 - [c23]Stephen Somogyi, Thomas F. Wenisch, Anastassia Ailamaki, Babak Falsafi, Andreas Moshovos:
Spatial Memory Streaming. ISCA 2006: 252-263 - [c22]Elham Safi, Andreas Moshovos, Andreas G. Veneris:
L-CBF: a low-power, fast counting bloom filter architecture. ISLPED 2006: 250-255 - 2005
- [j7]Andreas Moshovos, Babak Falsafi, Farid N. Najm, Navid Azizi:
A Case for Asymmetric-Cell Cache Memories. IEEE Trans. Very Large Scale Integr. Syst. 13(7): 877-881 (2005) - [c21]Andreas Moshovos, Alexandros Kostopoulos:
Memory State Compressors for Giga-Scale Checkpoint/Restore. IEEE PACT 2005: 303-314 - [c20]Won-Ho Park, Andreas Moshovos, Babak Falsafi:
RECAST: Boosting Tag Line Buffer Coverage in Low-Power High-Level Caches "for Free". ICCD 2005: 609-616 - [c19]Andreas Moshovos:
RegionScout: Exploiting Coarse Grain Sharing in Snoop-Based Coherence. ISCA 2005: 234-245 - 2004
- [c18]Chi F. Chen, Se-Hyun Yang, Babak Falsafi, Andreas Moshovos:
Accurate and Complexity-Effective Spatial Pattern Prediction. HPCA 2004: 276-287 - [c17]Amirali Baniasadi, Andreas Moshovos:
SEPAS: a highly accurate energy-efficient branch predictor. ISLPED 2004: 38-43 - 2003
- [j6]Ahmed Abdelkhalek, Angelos Bilas, Andreas Moshovos:
Behavior and Performance of Interactive Multi-Player Game Servers. Clust. Comput. 6(4): 355-366 (2003) - [j5]Navid Azizi, Farid N. Najm, Andreas Moshovos:
Low-leakage asymmetric-cell SRAM. IEEE Trans. Very Large Scale Integr. Syst. 11(4): 701-715 (2003) - [c16]Andreas Moshovos:
Checkpointing alternatives for high performance, power-aware processors. ISLPED 2003: 318-321 - 2002
- [j4]Andreas Moshovos, Gurindar S. Sohi:
Reducing Memory Latency via Read-after-Read Memory Dependence Prediction. IEEE Trans. Computers 51(3): 313-326 (2002) - [c15]Amirali Baniasadi, Andreas Moshovos:
Branch Predictor Prediction: A Power-Aware Branch Predictor for High-Performance Processors. ICCD 2002: 458-461 - [c14]Navid Azizi, Andreas Moshovos, Farid N. Najm:
Low-leakage asymmetric-cell SRAM. ISLPED 2002: 48-51 - [c13]Amirali Baniasadi, Andreas Moshovos:
Asymmetric-frequency clustering: a power-aware back-end for high-performance processors. ISLPED 2002: 255-258 - 2001
- [j3]Andreas Moshovos, Gurindar S. Sohi:
Microarchitectural innovations: boosting microprocessor performance beyond semiconductor technology scaling. Proc. IEEE 89(11): 1560-1575 (2001) - [c12]Andreas Moshovos, Gokhan Memik, Babak Falsafi, Alok N. Choudhary:
JETTY: Filtering Snoops for Reduced Energy Consumption in SMP Servers. HPCA 2001: 85-96 - [c11]Andreas Moshovos, Dionisios N. Pnevmatikatos
Slice-processors: an implementation of operation-based prediction. ICS 2001: 321-334 - [c10]Amirali Baniasadi, Andreas Moshovos:
Instruction flow-based front-end throttling for power-aware high-performance processors. ISLPED 2001: 16-21 - [c9]Ahmed Abdelkhalek, Angelos Bilas
Behavior and performance of interactive multi-player game servers. ISPASS 2001: 137-146 - 2000
- [j2]Andreas Moshovos, Gurindar S. Sohi:
Memory Dependence Prediction in Multimedia Applications. J. Instr. Level Parallelism 2 (2000) - [c8]Andreas Moshovos, Gurindar S. Sohi:
Memory Dependence Speculation Tradeoffs in Centralized, Continuous-Window Superscalar Processors. HPCA 2000: 301-312 - [c7]Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithviraj Banerjee:
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit. ISCA 2000: 225-235 - [c6]Amirali Baniasadi, Andreas Moshovos:
Instruction distribution heuristics for quad-cluster, dynamically-scheduled, superscalar processors. MICRO 2000: 337-347
1990 – 1999
- 1999
- [j1]Andreas Moshovos, Gurindar S. Sohi:
Speculative Memory Cloaking and Bypassing. Int. J. Parallel Program. 27(6): 427-456 (1999) - [c5]Amir Roth, Andreas Moshovos, Gurindar S. Sohi:
Improving virtual function call target prediction via dependence-based pre-computation. International Conference on Supercomputing 1999: 356-364 - [c4]Andreas Moshovos, Gurindar S. Sohi:
Read-After-Read Memory Dependence Prediction. MICRO 1999: 177-185 - 1998
- [c3]Amir Roth, Andreas Moshovos, Gurindar S. Sohi:
Dependance Based Prefetching for Linked Data Structures. ASPLOS 1998: 115-126 - 1997
- [c2]Andreas Moshovos, Scott E. Breach, T. N. Vijaykumar, Gurindar S. Sohi:
Dynamic Speculation and Synchronization of Data Dependences. ISCA 1997: 181-193 - [c1]Andreas Moshovos, Gurindar S. Sohi:
Streamlining Inter-Operation Memory Communication via Data Dependence Prediction. MICRO 1997: 235-245
Coauthor Index
Ameer Abdelhadi
aka: Ameer M. S. Abdelhadi
aka: Ameer M. S. Abdelhadi
Anastasia Ailamaki
aka: Anastassia Ailamaki
aka: Anastassia Ailamaki
Alberto Delmas Lascorz
aka: Alberto Delmas
aka: Alberto Delmas
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