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"A 3.9μW, 81.3dB SNDR, DC-coupled, Time-based Neural Recording IC with ..."

Hyuntak Jeon et al. (2018)

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DOI: 10.1109/ASSCC.2018.8579284

access: closed

type: Conference or Workshop Paper

metadata version: 2019-01-07

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  - conf/asscc/JeonBJLJKCJHJ18
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  - https://dblp.org/rec/conf/asscc/JeonBJLJKCJHJ18
Hyuntak Jeon, Jun-Suk Bang, Yoontae Jung, Taeju Lee, Yeseul Jeon, Seok-Tae Koh, Jaesuk Choi, Doojin Jang, Soonyoung Hong, Minkyu Je:
A 3.9μW, 81.3dB SNDR, DC-coupled, Time-based Neural Recording IC with Degeneration R-DAC for Bidirectional Neural Interface in 180nm CMOS. A-SSCC 2018: 91-92

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