default search action

combined dblp search
author search
venue search
publication search

ask others

"A Case Study in Fomal Verification of Register-Transfer Logic with ACL2: ..."

David M. Russinoff (2000)

> Home

Details and statistics

DOI: 10.1007/3-540-40922-X_3

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/fmcad/Russinoff00
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/fmcad/Russinoff00
David M. Russinoff:
A Case Study in Fomal Verification of Register-Transfer Logic with ACL2: The Floating Point Adder of the AMD Athlon^TM Processor. FMCAD 2000: 3-36

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.