default search action

combined dblp search
author search
venue search
publication search

ask others

"An effective hop-based detailed router for FPGAs for optimizing track ..."

Hasan Arslan, Shantanu Dutt (2004)

> Home

Details and statistics

DOI: 10.1145/988952.989003

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/glvlsi/ArslanD04
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/glvlsi/ArslanD04
Hasan Arslan, Shantanu Dutt:
An effective hop-based detailed router for FPGAs for optimizing track usage and circuit performance. ACM Great Lakes Symposium on VLSI 2004: 208-213

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.