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"Analog test bus architecture for small die size and limited pin count ..."
Eduardo Ribeiro da Silva et al. (2009)
- Eduardo Ribeiro da Silva, F. Costa, Frank Herman Behrens, Remerson Stein Kickhofel, Ricardo Maltione:
Analog test bus architecture for small die size and limited pin count devices with internal IPs testability emphasis. LATW 2009: 1-6
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