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"A 16GS/s 10b Time-domain ADC using Pipelined-SAR TDC with Delay ..."

Juzheng Liu et al. (2024)

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DOI: 10.1109/VLSITECHNOLOGYANDCIR46783.2024.10631373

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-17

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Juzheng Liu, Ayman Shabra, Stacy Ho, Gabriele Manganaro, Mike Shuo-Wei Chen:
A 16GS/s 10b Time-domain ADC using Pipelined-SAR TDC with Delay Variability Compensation and Background Calibration Achieving 153.8dB FoM in 4nm CMOS. VLSI Technology and Circuits 2024: 1-2

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