BibTeX record conf/vlsic/WangAZKBS20

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@inproceedings{DBLP:conf/vlsic/WangAZKBS20,
  author       = {Jingcheng Wang and
                  Hyochan An and
                  Qirui Zhang and
                  Hun{-}Seok Kim and
                  David T. Blaauw and
                  Dennis Sylvester},
  title        = {1.03pW/b Ultra-Low Leakage Voltage-Stacked {SRAM} for Intelligent
                  Edge Processors},
  booktitle    = {{IEEE} Symposium on {VLSI} Circuits, {VLSI} Circuits 2020, Honolulu,
                  HI, USA, June 16-19, 2020},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/VLSICircuits18222.2020.9162843},
  doi          = {10.1109/VLSICIRCUITS18222.2020.9162843},
  timestamp    = {Thu, 12 May 2022 09:46:31 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsic/WangAZKBS20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}