default search action

combined dblp search
author search
venue search
publication search

ask others

"The microarchitecture of a multi-threaded RISC-V compliant processing core ..."

Abdallah Cheikh et al. (2017)

> Home

Details and statistics

DOI: —

access: open

type: Informal or Other Publication

metadata version: 2018-08-13

- view
  - electronic edition @ arxiv.org (open access)
- export record
  dblp key:
  - journals/corr/abs-1712-04902
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/corr/abs-1712-04902
Abdallah Cheikh, Gianmarco Cerutti, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri:
The microarchitecture of a multi-threaded RISC-V compliant processing core family for IoT end-nodes. CoRR abs/1712.04902 (2017)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.