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"A CMOS SRAM Test Cell Design Using Selectively Metal-Covered Transistors ..."

Hiroshi Hatano (2012)

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DOI: 10.1587/TRANSELE.E95.C.1827

access: closed

type: Journal Article

metadata version: 2020-04-11

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  persistent URL:
  - https://dblp.org/rec/journals/ieicet/Hatano12
Hiroshi Hatano:
A CMOS SRAM Test Cell Design Using Selectively Metal-Covered Transistors for a Laser Irradiation Failure Analysis. IEICE Trans. Electron. 95-C(11): 1827-1829 (2012)

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