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"Design and implementation of image kernels using reversible logic gates."

Sithara Raveendran et al. (2020)

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DOI: 10.1049/IET-IPR.2019.1681

access: closed

type: Journal Article

metadata version: 2021-03-18

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  - https://dblp.org/rec/journals/iet-ipr/RaveendranEBH20
Sithara Raveendran, Pranose J. Edavoor, Nithin Kumar Yernad Balachandra, Vasantha Moodabettu Harishchandra:
Design and implementation of image kernels using reversible logic gates. IET Image Process. 14(16): 4110-4121 (2020)

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