default search action

combined dblp search
author search
venue search
publication search

ask others

"Hardware efficient multiplier-less multi-level 2D DWT architecture without ..."

Changkun Wu et al. (2017)

> Home

Details and statistics

DOI: 10.1049/IET-IPR.2016.0695

access: closed

type: Journal Article

metadata version: 2020-06-18

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/iet-ipr/WuZJL17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/iet-ipr/WuZJL17
Changkun Wu, Wei Zhang, Qi Jia, Yanyan Liu:
Hardware efficient multiplier-less multi-level 2D DWT architecture without off-chip RAM. IET Image Process. 11(6): 362-369 (2017)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.