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"A low-error, memory-based fast binary antilogarithmic converter."

L. Guna Sekhar Sai Harsha et al. (2021)

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DOI: 10.1002/CTA.2981

access: closed

type: Journal Article

metadata version: 2022-02-14

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  - journals/ijcta/HarshaJSVS21
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  - https://dblp.org/rec/journals/ijcta/HarshaJSVS21
L. Guna Sekhar Sai Harsha, Bhaskara Rao Jammu, Visweswara Rao Samoju, Sreehari Veeramachaneni, Noor Mohammad S.:
A low-error, memory-based fast binary antilogarithmic converter. Int. J. Circuit Theory Appl. 49(7): 2214-2226 (2021)

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