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"A 2.5-GHz DDFS-PLL With 1.8-MHz Bandwidth in 0.35-µm CMOS."

Andrea Bonfanti et al. (2008)

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DOI: 10.1109/JSSC.2008.922721

access: closed

type: Journal Article

metadata version: 2020-08-30

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Andrea Bonfanti, Davide De Caro, Alfio Dario Grasso, Salvatore Pennisi, Carlo Samori, Antonio G. M. Strollo:
A 2.5-GHz DDFS-PLL With 1.8-MHz Bandwidth in 0.35-µm CMOS. IEEE J. Solid State Circuits 43(6): 1403-1413 (2008)

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