• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 112 matches

• 2019
• 
  Binod Kumar, Masahiro Fujita, Virendra Singh:
  A Methodology for SAT-Based Electrical Error Debugging During Post-Silicon Validation. VLSID 2019: 389-394
• 
  Vaibhav Agarwal, Sneh Saurabh:
  Realizing Boolean Functions Using Probabilistic Spin Logic (PSL). VLSID 2019: 508-509
• 
  Richa Agrawal, Mike Borowczak, Ranga Vemuri:
  A State Encoding Methodology for Side-Channel Security vs. Power Trade-off Exploration. VLSID 2019: 70-75
• 
  Ghanshyam Bairwa, Souvik Mandal, Tatavarthy Venkat Nikhil, Bodhisatwa Mazumdar:
  Linear Approximation and Differential Attacks on Logic Locking Techniques. VLSID 2019: 365-370
• 
  Arijit Banerjee, Benton H. Calhoun:
  A Double Pumped Single-Line-Cache SRAM Architecture for Ultra-low Energy IoT and Machine Learning Applications. VLSID 2019: 299-304
• 
  Tapalina Banerjee, Sudip Poddar, Sarmishtha Ghoshal, Bhargab B. Bhattacharya:
  Design of Continuous-Flow Lab-on-Chip with 3D Microfluidic Network for Sample Preparation. VLSID 2019: 191-196
• 
  Shukla Banik, Suchismita Roy, Bibhash Sen:
  Test Configuration Generation for Different FPGA Architectures for Application Independent Testing. VLSID 2019: 395-400
• 
  Koushik Bharadwaj, Ashok Ray, Sushanta Bordoloi, Gaurav Trivedi:
  Current Collapse Reduction Technique Using N-Doped Buffer Layer into the Bulk Region of a Gate Injection Transistor. VLSID 2019: 494-495
• 
  Pramod Kumar Bharti, Neelam Surana, Joycee Mekie:
  Power and Area Efficient Approximate Heterogeneous 8T SRAM for Multimedia Applications. VLSID 2019: 139-144
• 
  Anirban Bhattacharjee, Chandan Bandyopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman:
  Improved Look-Ahead Approaches for Nearest Neighbor Synthesis of 1D Quantum Circuits. VLSID 2019: 203-208
• 
  Pradeep Kumar Biswal, Santosh Biswas:
  A Binary Decision Diagram Approach to On-line Testing of Asynchronous Circuits. VLSID 2019: 94-99
• 
  Debdut Biswas, Tarun Kanti Bhattacharyya:
  A Model of Spurs for Delta-Sigma Fractional PLLs. VLSID 2019: 512-513
• 
  Tathagato Bose, Kamalika Datta, Indranil Sengupta:
  Exploiting Negative Control Lines and Nearest Neighbor for Improved Comparator Design. VLSID 2019: 514-515
• 
  Simmi M. Bose, Varsha S. Lalapura, S. Saravanan, Madhura Purnaprajna:
  k-Core: Hardware Accelerator for k-Mer Generation and Counting used in Computational Genomics. VLSID 2019: 347-352
• 
  Madhuchhanda Brahma, Arnab Kabiraj, Santanu Mahapatra:
  Insights on Anisotropic Dissipative Quantum Transport in n-Type Phosphorene MOSFET. VLSID 2019: 179-184
• 
  Nilotpal Chakraborty, Arijit Mondal, Samrat Mondal:
  Intelligent Scheduling of Smart Appliances in Energy Efficient Buildings: A Practical Approach. VLSID 2019: 516-517
• 
  Harshal Chapade, Rajesh Zele:
  On-chip RF to DC Power Converter for Bio-Medical Applications. VLSID 2019: 522-524
• 
  Arjun Singh Chauhan, Vineet Sahula, Atanendu S. Mandal:
  Novel Randomized & Biased Placement for FPGA Based Robust Random Number Generator with Enhanced Uniqueness. VLSID 2019: 353-358
• 
  Ramanuj Chouksey, Chandan Karfa, Purandar Bhaduri:
  Improving Performance of a Path-Based Equivalence Checker Using Counter-Examples. VLSID 2019: 377-382
• 
  Prattay Chowdhury, Ujjwal Guin, Adit D. Singh, Vishwani D. Agrawal:
  Two-Pattern ∆IDDQ Test for Recycled IC Detection. VLSID 2019: 82-87
• 
  Antroy Roy Chowdhury, Nijwm Wary, Pradip Mandal:
  Energy Efficient Bidirectional Equalized Transceiver with PVT Insensitive Active Termination. VLSID 2019: 25-30
• 
  Yaswanth Krishna Yadav Danaboina, Pravanjan Samanta, Kamalika Datta, Indrajit Chakrabarti, Indranil Sengupta:
  Design and Implementation of Threshold Logic Functions Using Memristors. VLSID 2019: 518-519
• 
  Lalit Dani, Neeraj Mishra, Bulusu Anand:
  MOS Varactor RO Architectures in Near Threshold Regime Using Forward Body Biasing Techniques. VLSID 2019: 41-45
• 
  Rakesh Das, Anupam Chattopadhyay, Hafizur Rahaman:
  Optimizing Quantum Circuits for Modular Exponentiation. VLSID 2019: 407-412
• 
  Satyabrata Dash, Sukanta Dey, Anish Augustine, Sankar Dhar, Jan Pidanic, Zdenek Nemec, Gaurav Trivedi:
  RiverOpt: A Multiobjective Optimization Framework Based on Modified River Formation Dynamics Heuristic. VLSID 2019: 233-238
• 
  Piyali Datta, Arpan Chakraborty, Rajat Kumar Pal:
  A Capacity-Aware Wash Optimization for Contamination Removal in Programmable Microfluidic Biochip Devices. VLSID 2019: 413-418
• 
  Dipika Deb, John Jose, Maurizio Palesi:
  Performance Enhancement of Caches in TCMPs Using Near Vicinity Prefetcher. VLSID 2019: 13-18
• 
  Timothy Dee, Ian Richardson, Akhilesh Tyagi:
  Continuous Transparent Mobile Device Touchscreen Soft Keyboard Biometric Authentication. VLSID 2019: 539-540
• 
  Rajeswari Devadoss, Kolin Paul, M. Balakrishnan:
  Majority Logic: Prime Implicants and n-Input Majority Term Equivalence. VLSID 2019: 464-469
• 
  Somdip Dey, Enrique Zaragoza Guajardo, Basireddy Karunakar Reddy, Xiaohang Wang, Amit Kumar Singh, Klaus D. McDonald-Maier:
  EdgeCoolingMode: An Agent Based Thermal Management Mechanism for DVFS Enabled Heterogeneous MPSoCs. VLSID 2019: 19-24

skipping 82 more matches