default search action
37th ARCS 2024: Potsdam, Germany
- Dietmar Fey
, Benno Stabernack
Architecture of Computing Systems - 37th International Conference, ARCS 2024, Potsdam, Germany, May 14-16, 2024, Proceedings. Lecture Notes in Computer Science 14842, Springer 2024, ISBN 978-3-031-66145-7
Progress in Neural Networks
- Kevin Kauth, Christian Lanius, Tobias Gemmeke:
nAIxt: A Light-Weight Processor Architecture for Efficient Computation of Neuron Models. 3-17 - Philipp Kreowsky, Justin Knapheide, Benno Stabernack:
An Approach Towards Distributed DNN Training on FPGA Clusters. 18-32 - Daniel Geißler, Bo Zhou, Mengxi Liu, Sungho Suh, Paul Lukowicz:
The Power of Training: How Different Neural Network Setups Influence the Energy Demand. 33-47
Organic Computing
- Jens Decke
An Efficient Multi Quantile Regression Network with Ad Hoc Prevention of Quantile Crossing. 51-66 - Aleksey Koschowoj, Uwe Brinkschulte:
Modifiable Artificial DNA - Change Your System's ADNA at Any Time. 67-81 - Jens Decke
From Structured to Unstructured: A Comparative Analysis of Computer Vision and Graph Models in Solving Mesh-Based PDEs. 82-96 - Ghassan Al-Falouji
Enhancing Maritime Behaviour Analysis Through Novel Feature Engineering and Digital Shadow Modelling: A Case Study in the Kiel Fjord. 97-111 - Sourav Modak
Synthesizing Training Data for Intelligent Weed Control Systems Using Generative AI. 112-126 - Glen te Hofsté
Towards the Online Reconfiguration of a Dependable Distributed On-Board Computer. 127-141 - Timo Kisselbach
An Organic Computing Approach for CARLA Simulator. 142-157
Computer Architecture Co-Design
- Chao Qian, Christopher Cichiwskyj, Tianheng Ling, Gregor Schiele:
Idle is the New Sleep: Configuration-Aware Alternative to Powering Off FPGA-Based DL Accelerators During Inactivity. 161-176 - Daniele Passaretti
On-the-Fly CT Image Pre-processing on MPSoC-FPGAs. 177-191 - Emmanouil Skordalakis, Andrew Attwood, John Goodacre, Mikel Luján:
AccProf: Increasing the Accuracy of Embedded Application Profiling Using FPGAs. 192-206 - Matthias Rupp
Accelerating WebAssembly Interpreters in Embedded Systems Through Hardware-Assisted Dispatching. 207-220 - Philipp Friese
Exploring the ARM Coherent Mesh Network Topology. 221-235 - Johannes Kliemt
Comparison of a Binary Signed-Digit Adder with Conventional Binary Adder Circuits on Layout Level. 236-248
Progress in HPC
- Lilia Zaourar
Case Studies on the Impact and Challenges of Heterogeneous NUMA Architectures for HPC. 251-265 - Eric Borba
A Hierarchical Modeling Approach for Assessing the Reliability and Performability of Burst Buffers. 266-281 - Julien Rauch
Generative-Based Algorithm for Data Clustering on Hybrid Classical-Quantum NISQ Architecture. 282-297
Computer Architecture
- Luke Panayi, Rohan Gandhi, Jim Whittaker, Vassilios Chouliaras, Martin Berger
Improving Memory Dependence Prediction with Static Analysis. 301-315 - Antti Nurmi
Atalanta: Open-Source RISC-V Microcontroller for Rust-Based Hard Real-Time Systems. 316-330
Dependability and Fault Tolerance
- Peter Sobe
Software-Based Erasure-Tolerant Coding with Buffering and Compression. 333-343 - Alexander Benedict Behrens, Michael Gössel:
Determination of Optimal H-Matrices for 2-Bit Error Correcting Codes. 344-357
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-12-26 00:58 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by: