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9th DTIS 2014: Santorini, Greece
- Proceedings of the 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, DTIS 2014, Santorini, Greece, May 6-8, 2014. IEEE 2014, ISBN 978-1-4799-4972-4
- Said Hamdioui:
3D/ 2.5D stacked IC cost modeling and test flow selection. 1 - Juan Antonio Gómez Galán
, Rafael López-Ahumada
Low voltage analog readout channel based on gain-boosted amplifiers. 1-6 - Minas Dasygenis
A web EDA tool for the automatic generation of synthesizable VHDL architectures for a rapid design space exploration. 1-2 - Ashok Kumar Palaniswamy, Spyros Tragoudas, Themistoklis Haniotakis:
ATPG for transition faults of pipelined threshold logic circuits. 1-5 - Maha Kooli, Giorgio Di Natale:
A survey on simulation-based fault injection tools for complex systems. 1-6 - Gildas Léger
Doubly-segmented current-steering DAC calibration. 1-6 - Xrysovalantis Kavousianos, Krishnendu Chakrabarty
Recent advances in single- and multi-site test optimization for DVS-based SoCs. 1-6 - Pierre Vanhauwaert, Paolo Maistri, Régis Leveugle, Athanasios Papadimitriou
On error models for RTL security evaluations. 1-6 - Giuseppe Airo Farulla, Marco Indaco, Daniele Rolfo, Ludovico Orlando Russo, Pascal Trotta:
Evaluation of image deblurring algorithms for real-time applications. 1-6 - Said Hamdioui, Hassan Aziza, Georgios Ch. Sirakoulis
Memristor based memories: Technology, design and test. 1-7 - Ioannis Voyiatzis, Michel Renovell, Mohamed Masmoudi, Paolo Prinetto, Giorgio Di Natale:
DTIS 2014 foreword. 1 - Diego Alberto, Paolo Maistri, Régis Leveugle:
Electromagnetic attacks on embedded devices: A model of probe-circuit power coupling. 1-6 - Bernd Becker
Recent advances in SAT-based ATPG: Non-standard fault models, multi constraints and optimization. 1-10 - Noëlle Lewis:
Bio-electronic interaction: principle and applications. 1 - Abishek Ramdas, Samah Mohamed Saeed, Ozgur Sinanoglu
Slack removal for enhanced reliability and trust. 1-4 - Arda Guney
New floating inductance simulator employing a single ZC-VDTA and one grounded capacitor. 1-2 - Hans G. Kerkhoff, Jinbo Wan, Yong Zhao:
Linking aging measurements of health-monitors and specifications for multi-processor SoCs. 1-6 - Minas Dasygenis
Generation and validation of multioperand carry save adders from the web. 1-6 - Pia Juliane Wessely, Udo Schwalke:
2nd generation bilayer graphene transistors for applications in nanoelectronics. 1-3 - Luca Cassano
An inter-processor communication interface for data-flow centric heterogeneous embedded multiprocessor systems. 1-6 - Martin Keyn, Andreas Kramer, Udo Schwalke:
Dependence of annealing temperature on cluster formation during in situ growth of CNTs. 1-5 - Lionel Rousseau, Gaëlle Lissorgues:
MicroElectrode Array (MEA), a way to access to the Neural code for in-vitro and in-vivo applications, principle and fabrication. 1 - Loic Welter, Philippe Dreux, Jordan Innocenti, Hassen Aziza, Jean-Michel Portal:
Accurate multiplexed test structure for threshold voltage matching evaluation. 1-6 - Jean Arlat, Michel Diaz, Mohamed Kaâniche:
Towards resilient cyber-physical systems: The ADREAM project. 1-5 - Helen-Maria Dounavi
Stuck-at fault diagnosis in scan chains. 1-6 - Sonda Chtourou, Mohamed Abid, Zied Marrakchi, Habib Mehrez:
Power consumption analysis for mesh based FPGA. 1-5 - Jean-Max Dutertre
Laser attacks on integrated circuits: From CMOS to FD-SOI. 1-6 - Vinod Pangracious
Exploration and optimization of heterogeneous interconnect fabric of 3D tree-based FPGA. 1-6 - Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Guillaume Hubert
Layout-aware laser fault injection simulation and modeling: From physical level to gate level. 1-6 - Tillmann Krauss, Frank Wessely, Udo Schwalke:
An electrostatically doped planar device concept. 1-4 - Giovanna Turvani
Physical design and testing of Nano Magnetic architectures. 1-6 - Eric McAdams:
Bio-impedance spectroscopy. 1-2 - Anastasios N. Bikos
Easily verified IP watermarking. 1-2 - Ioannis Voyiatzis, Costas Efstathiou, Cleo Sgouropoulou
Accumulator-based self-adjusting output data compression for embedded word-organized DRAMs. 1-6 - Anastasis Keliris, Michail Maniatakos
Investigating large integer arithmetic on Intel Xeon Phi SIMD extensions. 1-6 - Ioannis Voyiatzis, Costas Efstathiou, Cleo Sgouropoulou
Low overhead output response compaction in RAS architectures. 1-3 - Constantinos Efstathiou, Kostas Tsoumanis, Kiamal Z. Pekmestzi, Ioannis Voyiatzis:
On the design of efficient modulo 2n+1 multiply-add-add units. 1-4
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