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33rd ISMVL 2003: Tokyo, Japan
- 33rd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2003), 16-19 May 2003, Tokyo, Japan. IEEE Computer Society 2003, ISBN 0-7695-1918-0
Invited Address
- Lotfi A. Zadeh:
Fuzzy Logic as a Basis for a Theory of Hierarchical Definability (THD). 3-6
Logic Design
- Elena Dubrova:
Implementation of Multiple-Valued Functions Using Literal-Splitting Technique. 7-10 - Noboru Takagi, Kyoichi Nakashima:
Hyperoperations on {0, 1, 2} Based on Min, Max, and Universal Literal Operations. 11-16 - Yoshinori Yamamoto:
An extension of ternary majority function and its application to evolvable system. 17-23 - Jong-Hak Hwang, Kyung-Jae Moon, Seung-Yong Park, Heung-Soo Kim:
A New Construction of the Irreducible Polynomial for parallel multiplier over GF(2m). 24-32
Functional Expressions
- K. J. Adams, J. McGregor:
New Information on the Effectiveness of Different Reed-Muller Algebras on the Representation of Quaternary Functions. 33-39 - Bogdan J. Falkowski, Cheng Fu:
Polynomial Expansions over GF(3) based on Fastest Transformation. 40-45 - Chol-U Lee, Gi-Young Byun, Bu-Sik Shin, Jae-Hwan Sim, Heung-Soo Kim:
The Generation Circulation Method to Generalized Reed-Muller Coefficients over GF(3). 46-49 - Dragan Jankovic, Radomir S. Stankovic, Claudio Moraga:
Optimization of GF(4) Expressions Using the Extended Dual Polarity Property. 50-58
Fuzzy Logic
- Irina Perfilieva
:
Normal Forms for Fuzzy Logic Functions. 59-64 - Vilém Novák:
Towards Fuzzy Type Theory. 65-70 - Siegfried Gottwald:
Universes of Fuzzy Sets - A Short Survey. 71-76 - Khosro Soleimani, Mashaallah Mashinchi, Hamid Reza Maleki
Fixed Points for Fuzzy Rule Bases and Fuzzy Chaining Syllogism. 77-82 - Syoji Kobashi, Katsuya Kondo, Yutaka Hata:
Automated Finding of the Willis Ring in MR Angiography Images Using Fuzzy Knowledge Base. 83-90
LSI Design
- Jun Sakiyama, Takafumi Aoki, Tatsuo Higuchi:
Counter Tree Diagrams for Design and Analysis of Fast Addition Algorithms. 91-98 - Takahiro Hanyu, Tomohiro Takahashi, Michitaka Kameyama:
Bidirectional Data Transfer Based Asynchronous VLSI System Using Multiple-Valued Current Mode Logic. 99-104 - E. Kinvi-Boh, M. Aline, Olivier Sentieys, Edgar "Dan" Olson:
MVL circuit design and characterization at the transistor level using SUS-LOC. 105-110 - Hafiz Md. Hasan Babu, Md. Rafiqul Islam, Amin Ahsan Ali, Mohammad Musa Salehin Akon:
A Technique for Logic Design of Voltage-Mode Pass Transistor Based Multi-Valued Multiple-Output Logic Circuits. 111-116 - Gi Soo Na, Sang Wan Kim, Jai Sock Choi, Heung-Soo Kim:
Recursive Evaluation of the Generalized Reed-Muller Coefficients. 117-124
Logic Design II
- Tsutomu Sasao:
Cascade Realizations of Two-valued Input Multiple-Valued Output Functions using Decomposition of Group Functions. 125-132 - Seok-Bum Ko, Jien-Chung Lo:
A Novel Technology Mapping Method for AND/XOR Expressions. 133-138 - Anas Al-Rabadi:
Iterative Symmetry Indices Decomposition for Ternary Logic Synthesis in Three-Dimensional Space. 139-145 - Mozammel H. A. Khan, Marek A. Perkowski, Pawel Kerntopf:
Multi-Output Galois Field Sum of Products Synthesis with New Quantum Cascades. 146-153 - Shoulie Xie, Susanto Rahardja, Zhenghui Gu:
Relationship between UCHT and FFT. 154-162
Logics and Algebras
- Dan A. Simovici:
Several Remarks on Non-Boolean Functions over Boolean Algebras. 163-168 - Tomoko Ninomiya, Masao Mukaidono:
Complete and Independent Sets of Axioms of Boolean Algebra. 169-174 - Matthias Baaz, Norbert Preining, Richard Zach
Characterization of the Axiomatizable Prenex Fragments of First-Order Gödel Logics. 175-180 - Carlos Ansótegui, Felip Manyà:
New Logical and Complexity Results for Signed-SAT. 181-187 - Christian G. Fermüller, Agata Ciabattoni
From Intuitionistic Logic to Gödel-Dummett Logic via Parallel Dialogue Games. 188-196
Invited Address
- Tetsuya Asai, Yoshihito Amemiya:
Biomorphic Analog Devices based on Reaction-Diffusion Systems. 197-206
LSI Circuits
- Takahiro Hanyu, Akira Mochizuki, Michitaka Kameyama:
Multiple-Valued Dynamic Source-Coupled Logic. 207-212 - Katsuhiko Degawa, Takafumi Aoki, Tatsuo Higuchi:
A Field-Programmable Digital Filter Chip Using Multiple-Valued Current-Mode Logic. 213-220 - Sung Il Han, Young Hee Choi, Hyeon Kyeong Seong, Heung-Soo Kim:
A Study on the Design of Flash Analog to Quaternary Converter Using DLC Comparator. 221-226 - Omid Mirmotahari, Yngvar Berg:
A Novel Multiple-Input Multiple-Valued Semi-Floating-Gate LATC. 227-234
Decision Diagrams I
- D. Michael Miller, Gerhard W. Dueck:
On the Size of Multiple-Valued Decision Diagrams. 235-240 - Denis V. Popel, Rolf Drechsler:
Efficient Minimization of Multiple-valued Decision Diagrams for Incompletely Specified Functions. 241-246 - Shinobu Nagayama, Tsutomu Sasao:
Compact Representations of Logic Functions using Heterogeneous MDDs. 247-252 - Rusins Freivalds, Masahiro Miyakawa, Ivo G. Rosenberg:
Complexity of Decision Trees for Boolean Functions. 253-258
Nano Technology
- Hiroshi Inokawa
Experimental and Simulation Studies of Single-Electron-Transistor-Based Multiple-Valued Logic. 259-266 - Ki-Whan Song, Sang-Hoon Lee, Dae Hwan Kim, Kyung Rok Kim, Jaewoo Kyung, Gwanghyeon Baek, Chun-An Lee, Jong Duk Lee, Byung-Gook Park:
Complementary Self-Biased Scheme for the Robust Design of CMOS/SET Hybrid Multi-Valued Logic. 267-272 - Tetsuya Uemura, Masafumi Yamamoto:
Proposal of Four-Valued MRAM based on MTJ/RTD Structure. 273-280
Modeling and Simulation
- Daniel Große
Modeling Multi-Valued Circuits in SystemC. 281-286 - Elena N. Zaitseva:
Dynamic Reliability Indices for Multi-State System. 287-292 - Marsha Chechik, Wendy MacCaull:
CTL Model-Checking over Logics with Non-Classical Negations. 293-302
Clone Theory
- Hajime Machida, Ivo G. Rosenberg:
On the Centralizers of Monoids in Clone Theory. 303-308 - Grant Pogosyan, Ivo G. Rosenberg:
Generation of the Post Lattice by Irreducible Clones. 309-314 - Lucien Haddad, G. E. Simons:
On Intervals of Partial Clones of Boolean Partial Functions. 315-322
Spectral Techniques
- Bogdan J. Falkowski, Cheng Fu:
Family of Fast Transforms over GF(3) Logic. 323-328 - Mitchell A. Thornton:
Spectral Transforms of Mixed-radix MVL Functions. 329-333 - René Krenz, Elena Dubrova, Andreas Kuehlmann:
Fast Algorithm for Computing Spectral Transforms of Boolean and Multiple-Valued Functions on Circuit Representation. 334-342
Invited Address
- Andrei A. Krokhin, Andrei A. Bulatov, Peter Jeavons:
Functions of multiple-valued logic and the complexity of constraint satisfaction: A short survey. 343-354
Applications
- Claudio Moraga, Chongfu Huang:
Learning subjective probabilities from a small data set. 355-360 - Görschwin Fey
Using Games for Benchmarking and Representing the Complete Solution Space using Symbolic Techniques. 361-366 - Denis V. Popel:
From Continuous to Multiple-valued Data. 367-374
Decision Diagrams II
- D. Michael Miller, Rolf Drechsler:
Augmented Sifting of Multiple-Valued Decision Diagrams. 375-382 - Jon T. Butler, Tsutomu Sasao:
On the Average Path Length in Decision Diagrams of Multiple-Valued Functions. 383-390 - Susanto Rahardja, Shoulie Xie:
Generalized Complex Spectral Decision Diagrams Using Unified Complex Hadamard Transform. 391-396
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