default search action
Microprocessors and Microsystems, Volume 50
Volume 50, May 2017
- Balakrishnan Ramalingam, Rengarajan Amirtharajan, John Bosco Balaguru Rayappan:
Hybrid image crypto system for secure image communication- A VLSI approach. 1-13 - Jingchuan Dong, Taiyong Wang, Bo Li, Zhe Liu, Zhiqiang Yu:
An FPGA-based low-cost VLIW floating-point processor for CNC applications. 14-25 - Affaq Qamar, Fahad Bin Muslim, Javed Iqbal, Luciano Lavagno:
LP-HLS: Automatic power-intent generation for high-level synthesis based hardware implementation flow. 26-38 - A. V. AnanthaLakshmi, Gnanou Florence Sudha:
Design of a reversible floating-point square root using modified non-restoring algorithm. 39-53 - Yi Wang, Lisha Dong, Zhong Ming, Yong Guan, Zili Shao:
Virtual duplication and mapping prefetching for emerging storage primitives in NAND flash memory storage systems. 54-65 - Kecheng Ji, Ming Ling, Yang Zhang, Longxing Shi:
An artificial neural network model of LRU-cache misses on out-of-order embedded processors. 66-79 - (Withdrawn) Power modeling for high performance network-on-chip architectures. 80-89
- Retraction notice to 'Power Modeling for High Performance Network-on-Chip Architectures' [Microprocessors and Microsystems 50 (2017) 80-89].
- Elisabeth Glocker, Qingqing Chen, Ulf Schlichtmann, Doris Schmitt-Landsiedel:
Emulation of an ASIC power and temperature monitoring system (eTPMon) for FPGA prototyping. 90-101 - Maha Kooli, Firas Kaddachi, Giorgio Di Natale, Alberto Bosio, Pascal Benoit, Lionel Torres:
Computing reliability: On the differences between software testing and software fault injection techniques. 102-112 - Vikram K. Narayana, Shuai Sun, Abdel-Hameed A. Badawy, Volker J. Sorger, Tarek A. El-Ghazawi:
MorphoNoC: Exploring the design space of a configurable hybrid NoC using nanophotonics. 113-126 - Zahra Shirmohammadi, Fereshte Mozafari, Seyed Ghassem Miremadi:
An efficient numerical-based crosstalk avoidance codec design for NoCs. 127-137 - Konstantin Berestizshevsky, Guy Even, Yaniv Fais, Jonatan Ostrometzky:
SDNoC: Software defined network on a chip. 138-153 - Milad Bagherian Khosroshahy, Mohammad Hossein Moaiyeri, Shaahin Angizi, Nader Bagherzadeh, Keivan Navi:
Quantum-dot cellular automata circuits with reduced external fixed inputs. 154-163 - Martha Johanna Sepúlveda, Daniel Flórez, Vincent Immler, Guy Gogniat, Georg Sigl:
Efficient security zones implementation through hierarchical group key management at NoC-based MPSoCs. 164-174 - Chenhao Xie, Jingweijia Tan, Mingsong Chen, Yang Yi, Lu Peng, Xin Fu:
Emerging technology enabled energy-efficient GPGPUs register file. 175-188 - Fernando A. Escobar, Anthony Kolar, Naim Harb, Filipe Vinci dos Santos, Carlos Valderrama:
Scalable shared-memory architecture to solve the Knapsack 0/1 problem. 189-201 - Lech Józwiak:
Advanced mobile and wearable systems. 202-221 - Jin-Young Kim, Tae-Hee You, Hyeokjun Seo, Sungroh Yoon, Jean-Luc Gaudiot, Eui-Young Chung:
An effective pre-store/pre-load method exploiting intra-request idle time of NAND flash-based storage devices. 222-236
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.