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IEEE Micro, Volume 33
Volume 33, Number 2, March - April 2013
- Erik R. Altman:
Hot Chips and the Incomplete Job of Exploiting Them. 4-5 - Christos Kozyrakis, Rumi Zahir:
Selected Research from Hot Chips 24. 6-7 - Ronald G. Dreslinski, David Fick, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew Fojtik, Sudhir Satpathy, Yoonmyung Lee
, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory K. Chen, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge:
Centip3De: A 64-Core, 3D Stacked Near-Threshold System. 8-16 - Robert Rogenmoser, Lawrence T. Clark:
Reducing Transistor Variability for High Performance Low Power Chips. 18-26 - Gregory Ruhl, Saurabh Dighe, Shailendra Jain, Surhud Khare, Sriram R. Vangal:
IA-32 Processor with a Wide-Voltage-Operating Range in 32-nm CMOS. 28-36 - C. Kevin Shum, Fadi Busaba, Christian Jacobi:
IBM zEC12: The Third-Generation High-Frequency Mainframe Microprocessor. 38-47 - John R. Feehrer, Sumti Jairath, Paul Loewenstein, Ram Sivaramakrishnan, David Smentek, Sebastian Turullols, Ali Vahidsafa:
The Oracle Sparc T5 16-Core Processor Scales to Eight Sockets. 48-57 - Richard Mateosian:
Ethics of Big Data. 60-61 - Shane Greenstein:
The Online Honesty Box. 62-63
Volume 33, Number 3, May - June 2013
- Erik R. Altman:
Ten Years of Top Picks. 2 - Babak Falsafi, Gabriel H. Loh:
Top Picks from the 2012 Computer Architecture Conferences. 4-7 - Arun Raghavan, Yixin Luo, Anuj Chandawalla, Marios C. Papaefthymiou, Kevin P. Pipe, Thomas F. Wenisch, Milo M. K. Martin:
Designing for Responsiveness with Computational Sprinting. 8-15 - Hadi Esmaeilzadeh, Adrian Sampson
Neural Acceleration for General-Purpose Approximate Programs. 16-27 - Daniel Wong
Scaling the Energy Proportionality Wall with KnightShift. 28-37 - Santosh Nagarakatte
Hardware-Enforced Comprehensive Memory Safety. 38-47 - Jonathan Kaveh Valamehr, Melissa Chase, Seny Kamara, Andrew Putnam
Inspection-Resistant Memory Architectures. 48-56 - Siva Kumar Sastry Hari, Sarita V. Adve, Helia Naeimi, Pradeep Ramachandran:
Relyzer: Application Resiliency Analyzer for Transient Faults. 58-66 - John Demme, Robert Martin, Adam Waksman, Simha Sethumadhavan:
A Quantitative, Experimental Approach to Measuring Processor Side-Channel Security. 68-77 - Timothy G. Rogers
Cache-Conscious Thread Scheduling for Massively Multithreaded Processors. 78-85 - Melanie Kambadur, Kui Tang, Martha A. Kim
Parallel Block Vectors: Collection, Analysis, and Uses. 86-94 - Abhayendra Singh, Satish Narayanasamy
A Safety-First Approach to Memory Models. 96-104 - Mahdi Nazm Bojnordi, Engin Ipek:
Programmable DDRx Controllers. 106-115 - Richard Mateosian:
Unconscious Meaning. 116-118 - Shane Greenstein:
Differentiated Platforms. 120
Volume 33, Number 4, July - August 2013
- Erik R. Altman:
Reliability, Theme Issues, and Plagiarism. 2 - Vijay Janapa Reddi:
Reliability-Aware Microarchitecture Design. 4-5 - Ulya R. Karpuzcu, Nam Sung Kim, Josep Torrellas:
Coping with Parametric Variation at Near-Threshold Voltages. 6-14 - Hao Wang, Nam Sung Kim:
Improving Throughput of Power-Constrained Many-Core Processors Based on Unreliable Devices. 16-24 - David J. Palframan, Nam Sung Kim, Mikko H. Lipasti:
Resilient High-Performance Processors with Spare RIBs. 26-34 - Charles Lefurgy, Alan J. Drake, Michael S. Floyd, Malcolm Allen-Ware, Bishop Brock, José A. Tierno, John B. Carter, Robert W. Berry:
Active Guardband Management in Power7+ to Save Energy and Maintain Reliability. 35-45 - Veit Kleeberger
A Cross-Layer Technology-Based Study of How Memory Errors Impact System Resilience. 46-55 - Lukasz G. Szafaryn, Brett H. Meyer, Kevin Skadron
Evaluating Overheads of Multibit Soft-Error Protection in the Processor Core. 56-65 - Youngtaek Kim, Lizy Kurian John, Sanjay Pant, Srilatha Manne, Michael J. Schulte, William Lloyd Bircher, Madhu Saravana Sibi Govindan:
Automating Stressmark Generation for Testing Processor Voltage Fluctuations. 66-75 - Shane Greenstein:
Platform Conflicts. 78-79
Volume 33, Number 5, September - October 2013
- Erik R. Altman:
Dark Silicon and Dangerous Predictions. 4-5 - Michael B. Taylor, Steven Swanson
Dark Silicon [Guest editors' introduction]. 6-7 - Michael B. Taylor:
A Landscape of the New Dark Silicon Design Regime. 8-19 - Arun Raghavan, Laurel Emurian, Lei Shao, Marios C. Papaefthymiou, Kevin P. Pipe, Thomas F. Wenisch, Milo M. K. Martin:
Utilizing Dark Silicon to Save Energy with Computational Sprinting. 20-28 - Nathaniel Ross Pinckney, Ronald G. Dreslinski, Korey Sewell, David Fick, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw:
Limits of Parallelism and Boosting in Dim Silicon. 30-37 - Liang Wang, Kevin Skadron
Implications of the Power Wall: Dim Cores and Reconfigurable Logic. 40-48 - Karthik Swaminathan, Emre Kultursay, Vinay Saripalli, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Suman Datta:
Steep-Slope Devices: From Dark to Dim Silicon. 50-59 - Rich Belgard:
Joseph A. (Josh) Fisher Receives the 2012 IEEE B. Ramakrishna Rau Award. 60-61 - Shane Greenstein:
Digital Public Goods. 62-63
Volume 33, Number 6, November - December 2013
- Erik R. Altman:
Cool Chips, Mobile Devices, Memory, and IEEE Micro Going Digital. 2 - Makoto Ikeda, Fumio Arakawa:
Cool Chips. 4-5 - Noriyuki Miura, Yusuke Koizumi, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura
A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip Interface. 6-15 - Toshio Yoshida, Takumi Maruyama, Yasunobu Akizuki, Ryuji Kan, Naohiro Kiyota, Kiyoshi Ikenishi, Shigeki Itou, Tomoyuki Watahiki, Hiroshi Okano:
Sparc64 X: Fujitsu's New-Generation 16-Core Processor for Unix Servers. 16-24 - Kazuki Fukuoka, Noriaki Maeda, Koji Nii, Masaki Fujigaya, Noriaki Sakamoto, Takao Koike, Takahiro Irita, Kohei Wakahara, Tsugio Matsuyama, Keiji Hasegawa, Toshiharu Saito, Akira Fukuda, Kaname Teranishi, Takeshi Kataoka, Toshihiro Hattori:
Power-Management Features of R-Mobile U2, an Integrated Application Processor and Baseband Processor. 26-36 - Rumi Zahir, Mark Ewert, Hari Seshadri:
The Medfield Smartphone: Intel Architecture in a Handheld Form Factor. 38-46 - Todor Cooklev, Akinori Nishihara:
An Open RF-Digital Interface for Software-Defined Radios. 47-55 - Bendik Kleveland, Michael John Miller, Ronald B. David, Jay Patel, Rajesh Chopra, Dipak K. Sikdar, Jeff Kumala, Socrates D. Vamvakos, Mike Morrison, Ming Liu, Jayaprakash Balachandran:
An Intelligent RAM with Serial I/Os. 56-65 - Jing Guo, Liyi Xiao, Zhigang Mao, Qiang Zhao:
Novel Mixed Codes for Multiple-Cell Upsets Mitigation in Static RAMs. 66-74 - Richard Mateosian:
Technical Design. 76-78 - Shane Greenstein:
How Much Apache? 80
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