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Rahul Kundu
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2010 – 2019
- 2019
- [j2]Rahul Kundu
, Fei Su, Prashant Goteti:
A Distributed Error and Anomaly Communication Architecture for Analog and Mixed-Signal Systems. J. Electron. Test. 35(3): 317-334 (2019)
2000 – 2009
- 2008
- [c7]Surendra Bommu, Kameshwar Chandrasekar, Rahul Kundu, Sanjay Sengupta:
CONCAT: CONflict Driven Learning in ATPG for Industrial designs. ITC 2008: 1-10 - 2003
- [c6]Rahul Kundu, R. D. (Shawn) Blanton:
ATPG for Noise-Induced Switch Failures in Domino Logic. ICCAD 2003: 765-769 - [c5]Rahul Kundu, R. D. (Shawn) Blanton:
Path Delay Test Generation for Domino Logic Circuits in the Presence of Crosstalk. ITC 2003: 122-130 - 2002
- [j1]Keerthi Heragu, Manish Sharma, Rahul Kundu, Ronald D. Blanton:
Test vector generation for charge sharing failures in dynamic logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(12): 1502-1508 (2002) - [c4]Rahul Kundu, R. D. (Shawn) Blanton:
Timed Test Generation Crosstalk Switch Failures in Domino CMOS Circuits. VTS 2002: 379-388 - 2001
- [c3]Keerthi Heragu, Manish Sharma, Rahul Kundu, R. D. (Shawn) Blanton:
Testing of Dynamic Logic Circuits Based on Charge Sharing. VTS 2001: 396-403 - 2000
- [c2]Rahul Kundu, Ronald D. Blanton:
Identification of crosstalk switch failures in domino CMOS circuits. ITC 2000: 502-509
1990 – 1999
- 1999
- [c1]Jingjing Xu, Rahul Kundu, F. Joel Ferguson:
A Systematic DFT Procedure for Library Cells. VTS 1999: 460-466
Coauthor Index
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