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William J. Schilp

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2000 – 2009

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2000
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Peter M. Maurer, William J. Schilp:
State-Machine Based Logic Simulation Using Three Logic Values. VLSI Design 2000: 430-435

1990 – 1999

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1999
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Peter M. Maurer, William J. Schilp:
Software Bit-Slicing: A Technique for Improving Simulation Performance. DATE 1999: 786-787
1996
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William J. Schilp, Peter M. Maurer:
Unit delay simulation with the inversion algorithm. ICCAD 1996: 412-417

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