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Yiqun Zhu
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2020 – today
- 2023
- [c11]Zehui Wen, Yiqun Zhu:
Algorithmic Protection Study Based on a Virtual Location. 6GN (1) 2023: 140-151 - 2022
- [j8]Yiqun Zhu
, Guojian Jin
Self-Attention and Convolution Fusion Network for Land Cover Change Detection over a New Data Set in Wenzhou, China. Remote. Sens. 14(23): 5969 (2022) - [j7]Shuxian Sun, Chunyu Liu, Yiqun Zhu, Haihang He, Shuai Xiao
Deep Reinforcement Learning for the Detection of Abnormal Data in Smart Meters. Sensors 22(21): 8543 (2022) - [c10]Sultan Alqahtani, Yiqun Zhu, Qizhi Shi, Xiaolin Meng, Xinhua Wang
A Highly Customizable and Efficient Hardware Implementation for Parallel Matrix Inversion. FPT 2022: 1-2 - 2020
- [j6]Dongyun Bai, Peng Huang, Yiqun Zhu, Hongxin Ma, Tailong Xiao, Tao Wang, Guihua Zeng:
Unidimensional continuous-variable measurement-device-independent quantum key distribution. Quantum Inf. Process. 19(2): 53 (2020) - [c9]Sultan Alqahtani, Yiqun Zhu, Qizhi Shi, Xiaolin Meng
Hardware Implementations with High Throughput, Low-Latency and Low-Area for Matrix Inversion. FPT 2020: 250-255
2010 – 2019
- 2019
- [j5]Rui Chen, Peng Huang
Robust Frame Synchronization Scheme for Continuous-Variable Quantum Key Distribution with Simple Process. Entropy 21(12): 1146 (2019) - [j4]Shuai Wang, Xueqin Jiang, Ping Wang, Yiqun Zhu:
An Artificial Noise assisted secrecy-enhancing scheme for Space-Time Shift Keying systems. Phys. Commun. 35 (2019) - 2013
- [j3]Diwei He, Nguyen C. Hoang, Barrie Hayes-Gill
Laser Doppler Blood Flow Imaging Using a CMOS Imaging Sensor with On-Chip Signal Processing. Sensors 13(9): 12632-12647 (2013) - [c8]Wenjuan Deng, Yiqun Zhu:
A memory-efficient hardware architecture for real-time feature detection of the SIFT algorithm (abstract only). FPGA 2013: 273 - 2012
- [c7]Wenjuan Deng, Yiqun Zhu, Hao Feng, Zhiguo Jiang:
An efficient hardware architecture of the optimised SIFT descriptor generation. FPL 2012: 345-352
2000 – 2009
- 2009
- [c6]Yiqun Zhu, Minglu Li, Chuliang Weng:
Ant Algorithm with Execution Quality Based Prediction in Grid Scheduling. ChinaGrid 2009: 77-83 - [c5]Lifan Yao, Hao Feng, Yiqun Zhu, Zhiguo Jiang, Danpei Zhao, Wenquan Feng:
An architecture of optimised SIFT feature detection for an FPGA implementation of an image matcher. FPT 2009: 30-37 - 2007
- [j2]Mohammed Benaissa, Yiqun Zhu:
Reconfigurable Hardware Architectures for Sequential and Hybrid Decoding. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(3): 555-565 (2007) - [c4]David P. Coggins, David W. P. Thomas, Barrie Hayes-Gill, Yiqun Zhu:
An FPGA Based Travelling-Wave Fault Location System. FPT 2007: 277-280 - 2006
- [c3]Yiqun Zhu, Barrie Hayes-Gill, Steve Morgan, Nguyen C. Hoang:
An FPGA based generic prototyping platform employed in a CMOS laser Doppler blood flow camera. FPT 2006: 281-284 - 2003
- [j1]Mohammed Benaissa, Yiqun Zhu:
A Novel High-Speed Configurable Viterbi Decoder for Broadband Access. EURASIP J. Adv. Signal Process. 2003(13): 1317-1327 (2003) - [c2]Yiqun Zhu, Mohammed Benaissa:
Reconfigurable Viterbi Decoding Using a New ACS Pipelining Technique. ASAP 2003: 360-368 - [c1]Yiqun Zhu, Mohammed Benaissa:
A novel ACS scheme for area-efficient Viterbi decoders. ISCAS (2) 2003: 264-267
Coauthor Index
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