Efficient Hardware Design for Computing Pairings Using Few FPGA In-built DSPs. - Brinci, Riadh; Khmiri, Walid; Mbarek, Mefteh; Rabaa, Abdellatif Ben; Bouallègue, Ammar (IACR Cryptol. ePrint Arch., 2015)

Efficient Multiplier for pairings over Barreto-Naehrig Curves on Virtex-6 FPGA. - Brinci, Riadh; Khmiri, Walid; Mbarek, Mefteh; Rabaa, Abdellatif Ben; Bouallegue, Ammar; Chekir, Faouzi (IACR Cryptol. ePrint Arch., 2013)