A Varactor-Based All-Digital Multi-Phase PLL with Random-Sampling Spur Suppression Techniques. - Chang, Chia-Wen; Lo, Kai-Yu; Ibrahim, Hossameldin A.; Su, Ming-Chiuan; Chu, Yuan-Hua; Jou, Shyh-Jye (IEICE Trans. Electron., 2016)

A 10-Gb/s, 1.24 pJ/bit, Burst-Mode Clock and Data Recovery With Jitter Suppression. - Su, Ming-Chiuan; Chen, Wei-Zen; Wu, Pei-Si; Chen, Yu-Hsian; Lee, Chao-Cheng; Jou, Shyh-Jye (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A Low-Jitter Cell-Based Digitally Controlled Oscillator With Differential Multiphase Outputs. - Su, Ming-Chiuan; Jou, Shyh-Jye; Chen, Wei-Zen (IEEE Trans. Very Large Scale Integr. Syst., 2015)

A 10Gbps, 1.24pJ/bit, burst-mode clock and data recovery with jitter suppression. - Su, Ming-Chiuan; Chen, Wei-Zen; Wu, Pei-Si; Chen, Yu-Hsian; Lee, Chao-Cheng; Jou, Shyh-Jye (2013)

Digitally-controlled cell-based oscillator with multi-phase differential outputs. - Su, Ming-Chiuan; Jou, Shyh-Jye (2011)