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P. V. Sriniwas Shastry

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2010 – 2019

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2012
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P. V. Sriniwas Shastry, Namrata Somani, Amruta Gadre, Bhagyashri Vispute, Mukul S. Sutaone:
Rolled architecture based implementation of AES using T-Box. MWSCAS 2012: 626-630

2000 – 2009

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2008
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Gadgil Amruta, Parthe Yogita, Pathak Puja, P. V. Sriniwas Shastry:
Low latency and high accuracy archtectures of cordic algorithm for cosine calculation on FPGA. ICECS 2008: 478-481

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