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Tomochika Harada
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2020 – today
- 2024
- [j4]Roberto Andrino Robles, Tomochika Harada:
Internal-states beat-frequency ADC using a subcircuit sharing architecture for SNDR improvement with decreased area tradeoff. IEICE Electron. Express 21(14): 20240286 (2024) - [c11]Tomochika Harada, Michio Yokoyama:
A Development and Evaluation of the IoT Activity Tracking System for the Daily Activity. GCCE 2024: 335-337 - 2023
- [c10]Tomochika Harada, Michio Yokoyama:
The Pillow-Type Unrestrained Heart Rate Measurement System for Sleep-State Analysis. GCCE 2023: 338-340 - [c9]Tomochika Harada, Michio Yokoyama, Shigeyuki Seko, Makoto Shohara, Ryosuke Takahashi, Satoru Miyoshi, Daisuke Yoshida:
Stress Data Collection and Analysis using "MindScale" for Stress Visualization. GCCE 2023: 754-756 - [c8]Michio Yokoyama
, Tomochika Harada, Shigeyuki Seko, Makoto Shohara
Stress Data Collection and Analysis Using "Mind Scale" with the Post-Covid World. ICCE 2023: 1-3 - [c7]Roberto Andrino Robles, Tomochika Harada:
A 0.6V Beat-Frequency ADC with Processing of Oscillator Internal States for Resolution Improvement. ICECS 2023: 1-4 - 2021
- [c6]Roberto Andrino Robles, Tomochika Harada, Michio Yokoyama
Evaluation of a Filter-less AD-PLL with a Wide Input Frequency Range Using a Fast-Locking Algorithm. ICECS 2021: 1-6 - [c5]Roberto Andrino Robles, Tomochika Harada:
A Low Power 0.6V Filter-less AD-PLL with a Fast Locking Algorithm in the Subthreshold Region. ISPACS 2021: 1-2 - 2020
- [j3]Minami Tsuchiya
Changing Tendency Analysis of Sleep Quality on the Basis of Temperature and Respiratory Frequency Using a Neural Network Model. Int. J. Fuzzy Log. Intell. Syst. 20(2): 87-95 (2020) - [c4]Roberto Andrino Robles, Tomochika Harada:
A 0.6V Programmable Frequency Divider and Digitally Controlled Oscillator for use in a Digital PLL in the Subthreshold Region. ICECS 2020: 1-4
2010 – 2019
- 2019
- [c3]Tomochika Harada:
Multi-Output Octagonal MOSFET for the Common Device of Both Sensor and Circuit Design. ISPACS 2019: 1-2 - 2018
- [c2]Tomochika Harada, Fumiya Kojima:
A 0.6V PWM Analog Differential Absolute Distance Circuit using Only a Reference Pulse Clock under the Subthreshold Region. ISPACS 2018: 382-385 - 2016
- [c1]Tomochika Harada, Koyo Kaiwa:
Stress direction and temperature detectable octagonal nMOSFET multi operation device. ISPACS 2016: 1-5 - 2013
- [j2]Seung-Il Cho
Design of low-power clock generator synchronized with AC power for adiabatic dynamic CMOS logic. IEICE Electron. Express 10(20): 20130716 (2013) - 2012
- [j1]Seung-Il Cho
Design of the ultra low-power synchronizer using ADCL buffer for adiabatic logic. IEICE Electron. Express 9(20): 1576-1585 (2012)
Coauthor Index
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