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Bruno de Carvalho Albertini
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2020 – today
- 2025
- [j6]Renan C. A. Alves
, Otávio F. Freitas, Bruno C. Albertini
Testing the limits of SPDM: Authentication of intermittently connected devices. Comput. Secur. 148: 104142 (2025) - 2023
- [i1]Renan C. A. Alves, Bruno C. Albertini, Marcos A. Simplício Jr.:
Benchmarking the Security Protocol and Data Model (SPDM) for component authentication. CoRR abs/2307.06456 (2023) - 2022
- [c7]Renan C. A. Alves, Bruno C. Albertini, Marcos A. Simplício Jr.
Securing hard drives with the Security Protocol and Data Model (SPDM). ISVLSI 2022: 446-447 - 2021
- [j5]Vitor Finotti
Simulating quantized inference on convolutional neural networks. Comput. Electr. Eng. 95: 107446 (2021)
2010 – 2019
- 2018
- [j4]Luckas A. Farias
A class of safe and efficient binary Edwards curves. J. Cryptogr. Eng. 8(4): 271-283 (2018) - [j3]Renan C. A. Alves, Doriedson A. G. Oliveira
WS3N: Wireless Secure SDN-Based Communication for Sensor Networks. Secur. Commun. Networks 2018: 8734389:1-8734389:14 (2018) - 2017
- [j2]Geovandro C. C. F. Pereira
Performance Evaluation of Cryptographic Algorithms over IoT Platforms and Operating Systems. Secur. Commun. Networks 2017: 2046735:1-2046735:16 (2017) - [c6]Lucas Gaia de Castro, Henrique Seiti Ogawa, Bruno de Carvalho Albertini
Automated Generation of HDL Implementations of Dadda and Wallace Tree Multipliers. SBESC 2017: 17-22 - 2015
- [c5]Luckas A. Farias, Bruno C. Albertini
Parallelism Level Analysis of Binary Field Multiplication on FPGAs. SBESC 2015: 64-69 - 2012
- [j1]Bruno C. Albertini
Computational reflection and its application to platform verification. Des. Autom. Embed. Syst. 16(1): 1-17 (2012) - 2011
- [b1]Bruno C. Albertini:
Abstractions level platforms. University of Campinas, Brazil, 2011
2000 – 2009
- 2009
- [c4]Gabriel Marcilio, Luiz C. V. dos Santos
A novel verification technique to uncover out-of-order DUV behaviors. DAC 2009: 448-453 - 2007
- [c3]Bruno C. Albertini
A computational reflection mechanism to support platform debugging in SystemC. CODES+ISSS 2007: 81-86 - [c2]Richard Maciel, Bruno C. Albertini
A Methodology and Toolset to Enable SystemC and VHDL Co-simulation. ISVLSI 2007: 351-356 - [c1]Fernando Kronbauer, Alexandro Baldassin
A Flexible Platform Framework for Rapid Transactional Memory Systems Prototyping and Evaluation. IEEE International Workshop on Rapid System Prototyping 2007: 123-129
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